Experience

Marvell Technology

• United States
• Semiconductor Manufacturing
• 700 & Above Employee

• Staff Analog Design Engineer

  • Nov 2019 - Present



GlobalFoundries

• United States
• Semiconductor Manufacturing
• 700 & Above Employee

• SMTS Design Engineer

  • Jun 2016 - Nov 2019

  1. 56Gbps back-plane RX VGA/CTLE re-vesion based on Globalfoundries 14LPP finfet process. --design a VGA with reduced power and improved gain--tuning LTE in CTLE, and verify RX front-end AFE/ACC.2. 60Gbps long-reach TX design based on Globalfoundries 7LP finfet process --design the datapath of TX (including SER16to8, FIFO and FFE slicers) 1. 56Gbps back-plane RX VGA/CTLE re-vesion based on Globalfoundries 14LPP finfet process. --design a VGA with reduced power and improved gain--tuning LTE in CTLE, and verify RX front-end AFE/ACC.2. 60Gbps long-reach TX design based on Globalfoundries 7LP finfet process --design the datapath of TX (including SER16to8, FIFO and FFE slicers)



Parade Technologies, Inc.

• United States
• Semiconductor Manufacturing
• 100 - 200 Employee

• Senior Analog Design Engineer

  • Jul 2011 - Jun 2016

  1. eDP to HDMI 2.0 Protocol Convertor @55nm CMOS process(Industry leading product, mass production) -- Design a 20To1 Serializer for Tx driver, with optimized timing and power -- Design ESD solution for whole chip, test results HBM 8kv ESD for connect pins and 7K ESD for all pins. -- Design reference clock for analog and logic circuits a new design to compensate LCO temperature based frequency variation. flexible switch between crystal clock and Low-Temp-Power-Variation LCO and RCO.2.MIPI/eDP to eDP Protocol Convertor. (First tape out sample and production) @ 0.11um CMOS process. -- Design Low power eDP Tx, including: * CMOS 10-1 serializer with up to 3.24Gbps date rate. * Low swing TX with flexible swing tuning and small intra-pair/inter pair skew.3.Reference clock design for HDMI 1.4b jitter clea