Joe Zbiciak

Senior Architect at MIPS
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Contact Information
us****@****om
(386) 825-5501
Location
San Francisco Bay Area

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Credentials

  • Compilers
    Coursera
    Jul, 2012
    - Nov, 2024
  • Algorithms: Design and Analysis, Part 1
    Coursera
    Apr, 2012
    - Nov, 2024
  • Model Thinking
    Coursera
    Apr, 2012
    - Nov, 2024
  • Introduction to AI
    www.ai-class.com (now merged with Udacity)
    Dec, 2011
    - Nov, 2024
  • Machine Learning
    ml-class.org (Now merged with Coursera)
    Dec, 2011
    - Nov, 2024

Experience

    • United States
    • Semiconductor Manufacturing
    • 100 - 200 Employee
    • Senior Architect
      • Oct 2023 - Present

  • Left Turn Only
    • Farmers Branch, TX
    • Proprietor and Lead Developer
      • 2007 - Present

      Job duties include: * Software tool development: Assembler, simulator, debugger and utilities in C, C++, Perl and assembly code. * Intellivision software development: CP-1600 assembly language * Hardware development: PIC24H-based board design using Eagle * Firmware development: ROM / RAM / NVRAM emulation in PIC24H firmware * Development support: Assist 3rd parties developing titles for Intellivision * Reverse engineering * Sales Left Turn Only develops… Show more Job duties include: * Software tool development: Assembler, simulator, debugger and utilities in C, C++, Perl and assembly code. * Intellivision software development: CP-1600 assembly language * Hardware development: PIC24H-based board design using Eagle * Firmware development: ROM / RAM / NVRAM emulation in PIC24H firmware * Development support: Assist 3rd parties developing titles for Intellivision * Reverse engineering * Sales Left Turn Only develops hardware and software products for classic video game systems, currently focused on the Mattel Intellivision. Left Turn Only has produced a handful of video game titles of its own, and has developed custom hardware solutions and software development solutions that fuel the current resurgence of video games for the Intellivision platform. LTO's hardware appears under the Left Turn Only brand, as well as Elektronite. I developed LTO's software development platform (jzIntv / SDK-1600), along with LTO's first software titles. I also developed the JLP family of Intellivision cartridge designs, which provide flexible memory maps and innovative features such as non-volatile memory at a low cost point. I'm continuing to develop new hardware and software for this platform. Show less Job duties include: * Software tool development: Assembler, simulator, debugger and utilities in C, C++, Perl and assembly code. * Intellivision software development: CP-1600 assembly language * Hardware development: PIC24H-based board design using Eagle * Firmware development: ROM / RAM / NVRAM emulation in PIC24H firmware * Development support: Assist 3rd parties developing titles for Intellivision * Reverse engineering * Sales Left Turn Only develops… Show more Job duties include: * Software tool development: Assembler, simulator, debugger and utilities in C, C++, Perl and assembly code. * Intellivision software development: CP-1600 assembly language * Hardware development: PIC24H-based board design using Eagle * Firmware development: ROM / RAM / NVRAM emulation in PIC24H firmware * Development support: Assist 3rd parties developing titles for Intellivision * Reverse engineering * Sales Left Turn Only develops hardware and software products for classic video game systems, currently focused on the Mattel Intellivision. Left Turn Only has produced a handful of video game titles of its own, and has developed custom hardware solutions and software development solutions that fuel the current resurgence of video games for the Intellivision platform. LTO's hardware appears under the Left Turn Only brand, as well as Elektronite. I developed LTO's software development platform (jzIntv / SDK-1600), along with LTO's first software titles. I also developed the JLP family of Intellivision cartridge designs, which provide flexible memory maps and innovative features such as non-volatile memory at a low cost point. I'm continuing to develop new hardware and software for this platform. Show less

  • Google
    • Silicon Valley, California, United States
    • Staff Software Engineer
      • Nov 2015 - Oct 2023

    • United States
    • Semiconductor Manufacturing
    • 700 & Above Employee
    • Architect - Distinguished Member of Technical Staff
      • May 1996 - Nov 2015

      DSP SoC architect, specializing in caches, memory protection, security and SIMD/VLIW instruction architectures. Owned memory system and security architecture for C64+ and C66 family DSPs. Direct contributor to nearly all facets of next generation DSP instruction set and system architecture. High level cache and performance validation expert. Developed highly unique tools to target performance anomalies and correctness issues (data corruption, deadlock) in cache… Show more DSP SoC architect, specializing in caches, memory protection, security and SIMD/VLIW instruction architectures. Owned memory system and security architecture for C64+ and C66 family DSPs. Direct contributor to nearly all facets of next generation DSP instruction set and system architecture. High level cache and performance validation expert. Developed highly unique tools to target performance anomalies and correctness issues (data corruption, deadlock) in cache hierarchies. SIMD/vector optimization and VLIW scheduling expert. Extensive expertise mapping algorithms to vectorized, exposed pipeline VLIW. Show less DSP SoC architect, specializing in caches, memory protection, security and SIMD/VLIW instruction architectures. Owned memory system and security architecture for C64+ and C66 family DSPs. Direct contributor to nearly all facets of next generation DSP instruction set and system architecture. High level cache and performance validation expert. Developed highly unique tools to target performance anomalies and correctness issues (data corruption, deadlock) in cache… Show more DSP SoC architect, specializing in caches, memory protection, security and SIMD/VLIW instruction architectures. Owned memory system and security architecture for C64+ and C66 family DSPs. Direct contributor to nearly all facets of next generation DSP instruction set and system architecture. High level cache and performance validation expert. Developed highly unique tools to target performance anomalies and correctness issues (data corruption, deadlock) in cache hierarchies. SIMD/vector optimization and VLIW scheduling expert. Extensive expertise mapping algorithms to vectorized, exposed pipeline VLIW. Show less

Education

  • Bradley University
    BSEE, Electrical Engineering w/ Computer Option
    1992 - 1996

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