Jiaxing Liang

Engineer at Private Machines Inc.
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Contact Information
us****@****om
(386) 825-5501
Location
Atlanta, Georgia, United States, US
Languages
  • English Full professional proficiency
  • Chinese Native or bilingual proficiency
  • Cantonese Native or bilingual proficiency
Skills

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Credentials

  • The Fundamentals of Engineering (FE) exam
    NCEES

Experience

  • Private Machines Inc.
    • United States
    • Software Development
    • 1 - 100 Employee
    • Engineer
      • Jan 2018 - Present

      Engineer at Private Machines Inc. Engineer at Private Machines Inc.

  • Virtalica Inc.
    • United States
    • Real Estate
    • 1 - 100 Employee
    • Engineer
      • 2020 - Present

      Engineer at Virtalica Inc. Engineer at Virtalica Inc.

  • Georgia Institute of Technology
    • United States
    • Higher Education
    • 700 & Above Employee
    • Graduate Research Assistant
      • Aug 2014 - Present

      Conduct and improve the micro-fabricated ultra-thin vapor chambers for silicon interposer integrated cooling. Study, analyze, model, design, fabricate and investigate an optimized passive liquid-vapor phase cooling device with overall thickness under 500 microns by software with Surface Evolver and Fluent, process with photolithography, silicon etching and ink-jet printing. Develop more reliable fabrication and assembly processes. Simulations demonstrate a better performance over conventional designs.

  • Georgia Institute of Technology, Atlanta
    • Undergraduate Research Assistant
      • Aug 2013 - Jul 2014

      Collaborated with two other peers on the research: Non-Traditional Compliant Off-Chip Secondary Interconnection at pitch of 400 microns. Fabricated the interconnections by photolithography-electroplate system in cleanroom. Fabricated samples achieved much higher compliance, lower electrical resistivity and more robustness over the traditional interconnection solder bump. Collaborated with two other peers on the research: Non-Traditional Compliant Off-Chip Secondary Interconnection at pitch of 400 microns. Fabricated the interconnections by photolithography-electroplate system in cleanroom. Fabricated samples achieved much higher compliance, lower electrical resistivity and more robustness over the traditional interconnection solder bump.

Education

  • Georgia Institute of Technology
    Master's degree, Mechanical Engineering
    2014 - 2016
  • Georgia Institute of Technology
    Bachelor's degree, Mechanical Engineering
    2012 - 2014
  • University of Arizona
    Bachelor's degree, Mechanical Engineering
    2010 - 2012

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