Experience

Qorvo Power

• United States
• Semiconductor Manufacturing
• 1 - 100 Employee

• Sr. Process Integration Engineer - SiC Power Devices

  • 2018 - Present

  Manage and monitor 6” Silicon Carbide wafer foundry output, test results, and parametric yield trends. Initiate yield improvement projects and integrate results into wafer process flow in Pilot and Production phases. Qualification of wafer processing changes and improvements as well as new material suppliers and their release into production. Manage and monitor 6” Silicon Carbide wafer foundry output, test results, and parametric yield trends. Initiate yield improvement projects and integrate results into wafer process flow in Pilot and Production phases. Qualification of wafer processing changes and improvements as well as new material suppliers and their release into production.



SRI

• United States
• Research Services
• 700 & Above Employee

• MTS, Lead Process Engineer

  • 2010 - 2018

  Process Module Lead Engineer in IC Wafer Fab responsible for sustainment and development of thin films deposited by PECVD, CVD, and LPCVD. Managed thin film area process control and equipment uptime of several multi-chamber tools. Start up and process characterization of Nitride, Polysilicon, and TEOS, and BPSG furnaces as well as PECVD Nitride, Oxide, PSG and BPSG. Back up and certified engineer on metal sputter tools and ion implanter. Obtained security clearance. Process Module Lead Engineer in IC Wafer Fab responsible for sustainment and development of thin films deposited by PECVD, CVD, and LPCVD. Managed thin film area process control and equipment uptime of several multi-chamber tools. Start up and process characterization of Nitride, Polysilicon, and TEOS, and BPSG furnaces as well as PECVD Nitride, Oxide, PSG and BPSG. Back up and certified engineer on metal sputter tools and ion implanter. Obtained security clearance.



Plextronics

• United States
• Nanotechnology Research
• 1 - 100 Employee

• Sr. Device Process Engineer

  • 2008 - 2010

  Optimized and sustained encapsulation processes for both the organic photovoltaic pilot production and R&D lines. Established testing protocol for evaluating encapsulation methods including temperature-humidity cycling, and general environmental testing. Optimized and sustained encapsulation processes for both the organic photovoltaic pilot production and R&D lines. Established testing protocol for evaluating encapsulation methods including temperature-humidity cycling, and general environmental testing.



Phiar Corporation

• Semiconductor Manufacturing
• 1 - 100 Employee

• Sr. Process Research Engineer

  • 2006 - 2008

  Process development and fabrication of novel thin film Niobium and Ytterbium MiiM Transistors. Equipment qualification and process optimization of ebeam evaporator, PECVD, contact photolithography, ion beam assisted sputterer, and ion milling tools in new wafer fab. Process development and fabrication of novel thin film Niobium and Ytterbium MiiM Transistors. Equipment qualification and process optimization of ebeam evaporator, PECVD, contact photolithography, ion beam assisted sputterer, and ion milling tools in new wafer fab.



Optical Communication Products

• United States
• Telecommunications

• Lead Process Engineer - VCSEL Technology

  • 2003 - 2006

  Supported and sustained all fabrication modules in the production of Vertical Cavity Surface Emitting Laser (VCSEL) products. These modules included: Photolithography, PECVD, RIE, Oxidation, and Metal Deposition. Optimized PECVD multi-layer dielectric mirror process improving yield by over 35%. Supported and sustained all fabrication modules in the production of Vertical Cavity Surface Emitting Laser (VCSEL) products. These modules included: Photolithography, PECVD, RIE, Oxidation, and Metal Deposition. Optimized PECVD multi-layer dielectric mirror process improving yield by over 35%.



Qusion Technologies

• North Brunswick, NJ

• Senior Process Engineer

  • 2001 - 2003

  Process Development, sustainment, and maintenance of a PECVD tool for nitride and oxide films. As the company progressed in its development of an InP EA Modulator, I developed a facet cleaving technique that enabled the company to obtain coupling results sufficient to secure an additional round of VC funding. Process Development, sustainment, and maintenance of a PECVD tool for nitride and oxide films. As the company progressed in its development of an InP EA Modulator, I developed a facet cleaving technique that enabled the company to obtain coupling results sufficient to secure an additional round of VC funding.



VIAVI Solutions

• United States
• Telecommunications
• 700 & Above Employee

• Senior Device Development Engineer - Epitaxx Division

  • 1999 - 2001

  Development of an InP 40 GHz Photoreceiver, requiring the implementation of a new processing platform with multi-level surfaces significantly different than the standard planar photodiode products. After material design by the program manager, I created the photolithography masks for the various levels, processed the devices, implemented BCB planarization, and developed a technique that reduced dark current by 40%. Development of an InP 40 GHz Photoreceiver, requiring the implementation of a new processing platform with multi-level surfaces significantly different than the standard planar photodiode products. After material design by the program manager, I created the photolithography masks for the various levels, processed the devices, implemented BCB planarization, and developed a technique that reduced dark current by 40%.



Lasertron

• Bedord, Massachusetts

• Development Engineer II - Advanced Technology Group

  • 1997 - 1999

  Process development and feasibility of a Tapered Unstable Resonator (TUR) Laser as well as advanced GaAs pump and InP DFB lasers. Process development and feasibility of a Tapered Unstable Resonator (TUR) Laser as well as advanced GaAs pump and InP DFB lasers.



MIT Lincoln Laboratory

• United States
• Defense and Space Manufacturing
• 700 & Above Employee

• Research Assistant

  • Jan 1997 - Sep 1997

  Performed etch studies of III-V semiconductors using a novel IBAE system. These etch techniques were used to integrate a laser diode with an etched facet on an optoelectronic-integrated chip. Appointment ended due to graduation. Performed etch studies of III-V semiconductors using a novel IBAE system. These etch techniques were used to integrate a laser diode with an etched facet on an optoelectronic-integrated chip. Appointment ended due to graduation.