Jason R.

Staff Integration Engineer at Phononic
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Contact Information
us****@****om
(386) 825-5501
Location
Durham, North Carolina, United States, US

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Donald Demas

Jason is an excellent individual to work with. I have had the opportunity to support him on many occasions. While assisting Jason, he is very detailed in his objectives and passing this information along. Making this a both a learning and positive work experience.

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Credentials

  • ASQ Certified Six Sigma Black Belt
    ASQ - World Headquarters
    Jun, 2021
    - Nov, 2024
  • ASQ Certified Six Sigma Black Belt
    ASQ - World Headquarters
    Jun, 2018
    - Nov, 2024
  • ASQ Certified Six Sigma Black Belt
    ASQ
    Jun, 2015
    - Nov, 2024
  • ASQ Certified Six Sigma Black Belt
    ASQ - World Headquarters
    Jun, 2012
    - Nov, 2024

Experience

  • Phononic Inc
    • United States
    • Renewable Energy Semiconductor Manufacturing
    • 1 - 100 Employee
    • Staff Integration Engineer
      • Aug 2014 - Present

      Developing corrosion resistant thermoelectric platform for non-hermetic applications. Leading heatpump performance, reliability and quality improvement projects.

    • Sr. Process Engineer
      • Nov 2010 - Jul 2014

      I led a team of process engineers and technicians to deliver a working thermoelectric prototype including developing ohmic contacts, ultrathin wafer transfer, release, metallization and singulation techniques in a novel compound semiconductor material.

  • RTI International
    • United States
    • Research Services
    • 700 & Above Employee
    • Research Engineer
      • Mar 2009 - Nov 2010

      I was a principal investigator responsible for project management, budgeting, hands-on process development, hands on physical and electrical characterization, reporting, publishing and presenting results in conferences, journals and to customers. Demonstrated working processes, test vehicles and published results at ECTC, IMAPS and IEEE conferences on the performance and reliability testing of high-density (10-µm pitch) Cu-Cu and Cu/Sn-Cu die-die interconnect and Atomic Layer Deposition of liners for high aspect ratio through silicon vias (TSVs) for 3DICs. Show less

  • RFMD (now Qorvo, Inc.)
    • United States
    • Semiconductor Manufacturing
    • 400 - 500 Employee
    • Staff Process Engineer
      • Nov 2008 - Mar 2009

      I performed process development, improvement and sustaining engineering on Au, Ni, Cu, and Sn electroplating, Au sputtering, wafer mounting, thinning and laser dicing in RFMD’s GaAs and GaN clean room production facility. I performed process development, improvement and sustaining engineering on Au, Ni, Cu, and Sn electroplating, Au sputtering, wafer mounting, thinning and laser dicing in RFMD’s GaAs and GaN clean room production facility.

  • RFMD (now Qorvo, Inc.)
    • United States
    • Semiconductor Manufacturing
    • 400 - 500 Employee
    • Staff Process Engineer
      • 2006 - 2008

      RF MEMS switch development, including wafer level packaging and integration with CMOS for tuner and mode switch applications. Senior Manager, Process Engineering (July to November 2008). Led a team of engineers in RF MEMS switch process development, piezoelectric-on-insulator and silicon resonator process development, and temperature compensated SAW device development. Demonstrated and trained others in the use of applied statistics, DOE and SPC techniques for process improvement and control. Staff Process Engineer (2006 to 2008). Demonstrated a working RF MEMS switch device inside a WLP in Charlotte fab. Produced working switch cantilever design, CAD, process and characterization test station and software within 2 months from date of hire. Developed a working WLP for thick electrodes. Performed work in photolithography, metals sputtering, plating, polymer deposition and patterning, PECVD dielectric deposition, and DC switch testing. Show less

  • VIAVI Solutions
    • United States
    • Telecommunications
    • 700 & Above Employee
    • Process Development Engineer and Process Owner
      • 2000 - 2006

      Process Development Engineer (2002 to 2006). Responsibilities included photolithography, plating, polymer dielectric layer deposition and patterning, microwave wafer test, and metals sputtering. Established plating simulation capability. Developed a thick photoresist lithography process. Authored more than forty formal test plans and reports to document research results, disseminate learning across the business unit and implement change. Created and maintained SPC systems for buffer layer, photolithography, electroplating, and microwave wafer test processes. Device Engineer (2000 to 2002). Developed prototype 2.5, 10, and 40 Gb/s bandwidth electro-optic telecom modulators and periodically poled LiNbO3 frequency doublers: specification development and documentation, process and device improvement with DOEs, traveler, test instruction, and manufacturing product flow diagram creation and operator training. Show less

  • Microelectronics and Computer Technology Consortium
    • Member Technical Staff
      • 1995 - 2000

      Senior Member, Technical Staff. Designed, built, tested, and patented RF MEMS phase-shifting switches, MEMS free-space optical beam-steering devices, and MEMS thermal switches integrated with Bi3Te2 thermoelectric elements. Work projects included design, fabrication, and assembly of flip-chip bonded devices and fabrication and testing of microvia/laminates and ceramic/Cu/polyimide multiple-chip packages. Senior Member, Technical Staff. Designed, built, tested, and patented RF MEMS phase-shifting switches, MEMS free-space optical beam-steering devices, and MEMS thermal switches integrated with Bi3Te2 thermoelectric elements. Work projects included design, fabrication, and assembly of flip-chip bonded devices and fabrication and testing of microvia/laminates and ceramic/Cu/polyimide multiple-chip packages.

Education

  • Cornell University
    Ph.D., Electrical Engineering
    1989 - 1995
  • Williams College
    B.A., Physics
    1985 - 1989

Community

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