Experience

Speedata.io
• Israel
• Semiconductors
• 1 - 100 Employee
• Senior Design Verification Engineer

  • Aug 2021 - Present


Progineer Technologies

• Palestine, State of
• Information Technology & Services
• 100 - 200 Employee

• Sr. Design Verification Team Lead - Intel

  • Mar 2018 - Aug 2021

  Design Verification for Intel corporation. SV with OVM/UVM Design Verification for Intel corporation. SV with OVM/UVM



ASAL Technologies

• Palestine, State of
• IT Services and IT Consulting
• 300 - 400 Employee

• Senior Design Verification Engineer - NUVOTON

  • Dec 2007 - Feb 2018

  Design Verification for Nuvoton Technology Israel Ltd. - Involved in verifying various types of embedded controllers and IC solutions targeting different applications and consumer products such as Desk-tops, Laptops, Servers. - Using many tools and languages: such as Cadence’s Specman e-Language,NC Verilog simulator, and NOVAS waveform Debugger (Verdi) over High Level and Gate level design. - functional coverage, eVC development and Verisity eRM. - Involved in DV for most of the EC modules and familiar with their specifications and standards, and familiar with bootloader flow and its C code debug. - Writing test plans (according to chip’s architecture specifications) for many EC modules. - Involved in Production Testing: writing/debugging tests with Test Engineers (TE) using Specman & C languages. Show less