Jack Koenig

Senior Staff Engineer at SiFive
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Contact Information
us****@****om
(386) 825-5501
Location
Berkeley, California, United States, US

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Experience

  • SiFive
    • United States
    • Semiconductor Manufacturing
    • 400 - 500 Employee
    • Senior Staff Engineer
      • Oct 2021 - Present

    • Staff Engineer
      • Dec 2018 - Oct 2021

    • Software Engineer
      • May 2018 - Dec 2018

    • Chisel & Firrtl Contractor
      • Dec 2016 - May 2018

  • Google
    • United States
    • Software Development
    • 700 & Above Employee
    • Hardware Engineer Intern
      • May 2016 - Aug 2016

  • Apple
    • United States
    • Computers and Electronics Manufacturing
    • 700 & Above Employee
    • Intern
      • Jun 2014 - Aug 2014

      Worked on ISA and sequence coverage for processor verification Worked on ISA and sequence coverage for processor verification

  • The University of Texas at Austin
    • United States
    • Higher Education
    • 700 & Above Employee
    • Research Assistant
      • Jun 2012 - May 2014

      Wrote an undergraduate thesis in early stage power modelling in Derek Chiou's FAST research group.

    • Teaching Assistant
      • Aug 2013 - Dec 2013

      I was an undergraduate teaching assistant for Professor Yale Patt's Introduction to Computing (EE 306) class.

    • Tutor
      • Jan 2011 - May 2013

      Assist engineering students with electrical engineering courses.

  • Arm
    • United Kingdom
    • Semiconductor Manufacturing
    • 700 & Above Employee
    • Validation Intern
      • May 2013 - Aug 2013

      I developed a data collection and analysis tool for the L2 testbench. I also helped expand the tool flow to apply to other testbenches. I developed a data collection and analysis tool for the L2 testbench. I also helped expand the tool flow to apply to other testbenches.

  • Intel Corporation
    • United States
    • Semiconductor Manufacturing
    • 700 & Above Employee
    • Undergraduate Intern
      • Feb 2011 - Sep 2011

      Assisted architects on Intel Atom system on chip team Implemented and maintained scripts to automate project documentation Managed SecureWiki of project data Evaluated signal latency between components Assisted architects on Intel Atom system on chip team Implemented and maintained scripts to automate project documentation Managed SecureWiki of project data Evaluated signal latency between components

Education

  • University of California, Berkeley
    Master of Science - MS, Computer Architecture
    2014 - 2018
  • The University of Texas at Austin
    BS, BA, Computer Engineering, Plan II Honors
    2009 - 2014
  • The University of Edinburgh
    Informatics
    2012 - 2012

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