Experience

ABOV Semiconductor Co., Ltd.

• South Korea
• Semiconductor Manufacturing
• 1 - 100 Employee

• Executive Vice President Sales Marketing

  • Mar 2021 - Present

• Senior Vice President Sales Marketing

  • Mar 2021 - Mar 2022



Samsung Electro-Mechanics

• South Korea
• Appliances, Electrical, and Electronics Manufacturing
• 700 & Above Employee

• Vice President of Product Planning

  • Dec 2017 - Jan 2021

  Product Planning for Long-term Corpoartion Strategy• Managing product planning team to incubate new products from concepts to products - Communication Modules, Camera Modules, PKG Substrates, MLCC, Power Inductors, Chip Resistors, and SoCs - Sensor (touch, force, and rotation) Modules for smart phones and wearable devices• Defining long-term product roadmaps for main products• Promoting current products and future products to global customers • Monitoring and surveying global IT market trends for new business opportunities • Providing strategic and technical leadership for cross-functional goals Show less

• Vice President of Engineering

  • Apr 2013 - Nov 2017

  SoC Design for Camera modules, Sensor modules, and WiFi modules• Managed IC development team from concept to manufacturing and balancing the needs of innovation and aggressive product scheduling• Interfaced Marketing and Product Planning teams and proposing various IC and module solutions to accommodate fast changing customers’ needs and requirements• Managed IC development team of RFIC and Analog Mixed Signal designers for integrated multi-chip Cellular Front-End Modules and WiFi Front-End Modules- GSM/DCS/WCDMA/4G-LTE PA, LNA, RF Switches and MIPI Control IC using Winsemi GaAs HBT process and Global Foundries SOI process- 802.11.a/b/g/n/ac WiFi PA, LNA, RF Switches and MIPI Control IC using Winsemi GaAs HBT process and Global Foundries SOI process- 802.11.ax WiFi PA, LNA, RF Switches and MIPI Control IC using Global Foundries SiGe 0.18um process• Managed IC development team of Analog Mixed Signal designers for Camera Module and Piezo Haptic Actuator Modules- Innovative Sensorless Optical Image Stabilizer (OIS) SoC using 32-bit micro-processor and analog/digital control circuits with TSMC 0.18 and UMC 0.11um CMOS processes- Innovative Sensorless Auto-Focus IC with Megnachip 0.18 CMOS processe- Piezo Haptic Driver IC using DC-DC converter and analog/digital control circuits with TowerJazz 0.18um BCD process• Managed IC development team of Analog Mixed Signal designers for Sensor Module and HDI board test ASIC- 6-axis Gyro and Accelerometer Driver IC using low-noise and variable gain analog circuits and digital control circuits with TSMC 0.18 CMOS process- Touch Screen Panel (TSP) SoC using 32-bit micro-processor and mutual capacitive sensing analog front-end circuits and digital control circuits with TSMC 0.18 CMOS process Show less



Intel Corporation

• United States
• Semiconductor Manufacturing
• 700 & Above Employee

• IC/SoC Design Manager

  • Dec 2010 - Mar 2013

  High Speed Serial I/O Design for CPU and Peripherals • Managed High-Speed Serial IO design team using 10nm CMOS process - Responsible for High Speed Serial IO Architecture and Building Block Design - Responsible for Test Vehicle Design of High Speed Serial I/O • Designed TX of 12Gbps SAS and 10Gbps USB on 14nm CMOS Process • Designed TX of 8Gbps PCIE and 6Gbps SAS on 45nm CMOS Process for Server Platform - Responsible for Building Block Design : TX Pre-Driver, Serializer and Termination block - Responsible for Layout Floorplan, Pre/Post-Silicon Validation/Debugging, Statistic Analysis, Package/Noise Analysis Show less



NXP acquires Freescale Semiconductor

• United States
• Semiconductor Manufacturing
• 700 & Above Employee

• RFIC Engineer Level 5 (Principal Engr)

  • Nov 2008 - Dec 2010

  RFIC Design for Wireless Communication Systems • RFIC Design Lead • Design Lead of 2.4GHZ IEEE 802.15.4 / Zigbee RFIC, TSMC 120nm process • Design Lead of 400MHz ISM-Band RFIC for Medical Applications, TSMC 180nm process • Responsible for the following tasks - RF Transceiver Architecture - TX/RX Building Blocks Design (RF Front-end and Analog Baseband) - DFT (Design for Test) and Silicon Debugging - Layout Floorplan, Pre/Post-Silicon Validation, Statistic Analysis, Noise Analysis Show less



Intel Corporation

• United States
• Semiconductor Manufacturing
• 700 & Above Employee

• Staff Analog Engineer

  • Apr 2004 - Oct 2008

  High Speed Serial I/O Design for CPU and Peripherals • Designed PCIE Gen2 (5Gbps) Receiver for i5 and i7 Intel Processors, 45nm CMOS process - Responsible for the following tasks - RX : VGA, Continuous Time Equalizer, Discrete Time Equalizer, Offset Correction Loop, Phase Interpolator, Clock Data Recovery Loop, De-serializer - Layout Floorplan, Pre/Post-Silicon Validation, Statistic Analysis, Package/Noise Analysis, and Reliability Verification Analysis - DFT (Design for Test) and Silicon Debugging • Designed CSI (Common Serial Interface, 6.4Gbps) Receiver, 65nm CMOS Process • Designed Fully Buffered DIMM (4.8Gbps) Receiver, 90nm CMOS Process Mobile Communication Chipset Design • Lead Architect for Multi-Standard (GSM/EDGE/WCDMA) Direct-Conversion and Low-IF Transceiver - Responsible for the following tasks - Analysis of GSM850/EGSM/DCS1800/PCS1900 Standards - Analysis of WCDMA 850/1900/2100MHz Standards - Analysis of Multi-band Dual-Mode Direct Conversion Receiver Architecture - Top-level and Block-level Transceiver Design Specifications - Link Budget Analysis / Transceiver Lineup Show less



DACOM, Korea

• Seoul Korea

• Sr. Engineer

  • Jul 1992 - Jul 2000

  Wireless Communication Systems Development • Development of 3G WCDMA Chipset (based on the 3GPP Standard) • Research on Framework of Radio Interface(s) for IMT-2000 System • Link Budget Analysis for Wideband-CDMA System • Development of Radio Propagation Prediction System : Cell Planning Tool • Modeling and Programming of Radio Propagation Path Loss : Okumura, Longley-Rice, COST231-Walfish Ikegami, Lee, and Hata model Wireless Communication Systems Development • Development of 3G WCDMA Chipset (based on the 3GPP Standard) • Research on Framework of Radio Interface(s) for IMT-2000 System • Link Budget Analysis for Wideband-CDMA System • Development of Radio Propagation Prediction System : Cell Planning Tool • Modeling and Programming of Radio Propagation Path Loss : Okumura, Longley-Rice, COST231-Walfish Ikegami, Lee, and Hata model