Hao-Chih Yuan

Sr. Product Engineer at WaferTech
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Contact Information
us****@****om
(386) 825-5501
Location
Vancouver, Washington, United States, US
Languages
  • English -
  • Chinese Mandarin Native or bilingual proficiency

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Experience

    • United States
    • Semiconductor Manufacturing
    • 300 - 400 Employee
    • Sr. Product Engineer
      • Oct 2019 - Present

      1. Work with OEM or Fabless customers in new tape-out, product qual, reliability assessment, and failure analysis 2. Use subject-matter expertise and big data (Excel, JMP) to identify yield improvement opportunity, evaluate benefit and risk, charter and oversee improvement activities 1. Work with OEM or Fabless customers in new tape-out, product qual, reliability assessment, and failure analysis 2. Use subject-matter expertise and big data (Excel, JMP) to identify yield improvement opportunity, evaluate benefit and risk, charter and oversee improvement activities

    • R&D Manager
      • Jan 2017 - Oct 2019

      1. Led a team to successfully prototyped CPV + 1-sun hybrid solar panel 2. Mentored team members, set schedule and development plan, documented and presented progress 3. Characterized opto-electrical properties of the solar panel, identified performance gap 1. Led a team to successfully prototyped CPV + 1-sun hybrid solar panel 2. Mentored team members, set schedule and development plan, documented and presented progress 3. Characterized opto-electrical properties of the solar panel, identified performance gap

    • United States
    • Software Development
    • 1 - 100 Employee
    • Senior Engineer/Researcher
      • Oct 2014 - Nov 2016

      1. Developed metal-oxide semiconductor materials and process integration, identified key process steps, improved performance and yield by DOE 2. Integrated metal-oxide semiconductor process with polymer substrate, prototyped first-of-the-kind flexible, active-matrix force sensor array 1. Developed metal-oxide semiconductor materials and process integration, identified key process steps, improved performance and yield by DOE 2. Integrated metal-oxide semiconductor process with polymer substrate, prototyped first-of-the-kind flexible, active-matrix force sensor array

    • United States
    • Research Services
    • 700 & Above Employee
    • Research Scientist
      • Mar 2010 - Oct 2014

      1. Led high-efficiency solar cell development• Conceptualized development plan, assigned tasks, supervised technicians and worked across disciplines • Delivered >20% solar cell energy-conversion efficiency milestone within 12 months, awarded with NREL President’s Award2. Led collaborative research activities• Worked with private companies and created objectives and deliverables• Mentored team members, and oversaw project execution and milestone delivery

    • Post-doc
      • Jun 2007 - Mar 2010

      Developed nano-structured “black” Si solar cell and facilitated technology licensing; received Key Contributor award for the success of NREL’s technology transfer mission

    • Higher Education
    • 700 & Above Employee
    • Research and Teaching Assistant
      • Jan 2003 - May 2007

      Developed flexible RF-frequency transistors using Si, strained-Si/SiGe nano-scale thin films and achieved the highest RF performance among the monolithic integrated flexible microelectronics at the time; received Best Dissertation Award Developed flexible RF-frequency transistors using Si, strained-Si/SiGe nano-scale thin films and achieved the highest RF performance among the monolithic integrated flexible microelectronics at the time; received Best Dissertation Award

    • India
    • Appliances, Electrical, and Electronics Manufacturing
    • 1 - 100 Employee
    • Etching Process Engineer
      • Jul 1997 - Jan 2002

      1. Hands-on experience in IC manufacturing, including process development, defect reduction, yield improvement, cost reduction, total quality management (SPC, DOE, FMEA, Ford-8D...) 2. Led a team effort to solve a major process defect, won 3rd Place in Continuous Improvement Team competition 3. Worked with customers in product transfer projects, oversaw etching process development and performance benchmark 1. Hands-on experience in IC manufacturing, including process development, defect reduction, yield improvement, cost reduction, total quality management (SPC, DOE, FMEA, Ford-8D...) 2. Led a team effort to solve a major process defect, won 3rd Place in Continuous Improvement Team competition 3. Worked with customers in product transfer projects, oversaw etching process development and performance benchmark

Education

  • Washington State University Vancouver
    Certificate, Leadership Development
    2021 - 2021
  • University of Wisconsin-Madison
    Doctoral, Electrical and Computer Engineering
    2002 - 2007
  • National Tsing Hua University
    Master's degree, materials science and engineering
    1989 - 1995

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