Green Chuang
R&D Wafer Level Optical Integration Section Manager at Visera- Claim this Profile
Contact Information
us****@****om
(386) 825-5501
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Location
Taipei–Keelung Metropolitan area, TW
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Experience
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Visera
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Semiconductor Manufacturing
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100 - 200 Employee
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R&D Wafer Level Optical Integration Section Manager
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Sep 2020 - Present
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Taiwan Semiconductor Manufacturing Company Limited
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India
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Appliances, Electrical, and Electronics Manufacturing
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1 - 100 Employee
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CoWoS Senior Process Engineer
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Jan 2018 - Sep 2020
New technical development to solve process defect and yield improvement. New technical development to solve process defect and yield improvement.
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VisEra
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Hsinchu City, Taiwan, Taiwan
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Senior Process Integration Engineer
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Nov 2014 - Jan 2018
R&D site CIS color filter process and new scheme/structure development & study R&D site CIS color filter process and new scheme/structure development & study
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Education
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國立臺灣科技大學
Master of Material Science and Engineering, Material Science and Engineering
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