Experience

weasic Microelectronics

• Greece
• Semiconductors
• 1 - 100 Employee

• Co-founder, CTO

  • Jul 2014 - Present



Ceragon Networks

• Telecommunications
• 700 & Above Employee

• RFIC Expert

  • Sep 2010 - Jun 2014

  Millimeter Wave RFIC Design. LO generation paths up to 86GHz in various SiGe technologies Millimeter Wave RFIC Design. LO generation paths up to 86GHz in various SiGe technologies



ELXYS Innovations S.A.

• Greece
• Semiconductor Manufacturing

• Co Founder - Director

  • Sep 2007 - Aug 2010

  Millimeter Wave RFIC Design. LO generation paths up to 42GHz. Fractional Synthesizer operating up to 13GHz in SiGe 0.13um technology. PDK enhancements & EDA support for mmWave applications Millimeter Wave RFIC Design. LO generation paths up to 42GHz. Fractional Synthesizer operating up to 13GHz in SiGe 0.13um technology. PDK enhancements & EDA support for mmWave applications



Broadcom

• United States
• Semiconductor Manufacturing
• 700 & Above Employee

• Senior Staff IC Design Scientist

  • Oct 2005 - Aug 2007

  RFIC design. Design of the UHF front-end of the DVB-H chipset BCM2940 in 65nm TSMC RFIC design. Design of the UHF front-end of the DVB-H chipset BCM2940 in 65nm TSMC



Athena Semiconductors

• Semiconductor Manufacturing

• Senior RFIC designer

  • Mar 2002 - Sep 2005

  RFIC design. The UHF receiver chain of DVB-H chipset in 180nm UMC. The LO generation path of 802.11a/b chipset in 180nm UMC. The LO generation path of tri-band chipset (0.8-0.9/1.8-1.9GHz) in 180nm UMC. RFIC design. The UHF receiver chain of DVB-H chipset in 180nm UMC. The LO generation path of 802.11a/b chipset in 180nm UMC. The LO generation path of tri-band chipset (0.8-0.9/1.8-1.9GHz) in 180nm UMC.



Helic

• United States
• Semiconductor Manufacturing
• 1 - 100 Employee

• IC Designer

  • Nov 2000 - Dec 2001

  Modeling the effect of substrate on integrated inductors performance embedded in CMOS and BiCMOS processes. IC design and Layout Modeling the effect of substrate on integrated inductors performance embedded in CMOS and BiCMOS processes. IC design and Layout



Integrated Systems Development S.A.

• Athens,Greece

• Device Model Designer

  • Sep 1998 - Oct 2000

  Device engineering of Flash Memory cells with floating spacers & High voltage DMOS devices. IC design and layout of peripheral circuits of Flash Memories Device engineering of Flash Memory cells with floating spacers & High voltage DMOS devices. IC design and layout of peripheral circuits of Flash Memories



NCSR Demokritos

• Athens,Greece

• Research Assistant

  • Jan 1997 - Aug 1998

  Flash memories characterization. Gate Oxide reliability & aging Flash memories characterization. Gate Oxide reliability & aging