Gale Straney

Software/Firmware Engineering Consultant at AZAD Technology Partners
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Location
Portland, Oregon, United States, US

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Experience

    • United States
    • Information Technology & Services
    • 1 - 100 Employee
    • Software/Firmware Engineering Consultant
      • Feb 2018 - Present
    • United States
    • Sr. Software Design Engineer/Architect
      • Jan 2009 - Dec 2017

      During this time I worked for the Beaverton based Real Time Spectrum Analyzer group. I’ve done product design and development on the high end desktop spectrum analyzers and low end disaggregated USB spectrum analyzers. Tasks included everything from the UI coded in C#, through the HAL and board support layers (managed & unmanaged C++), across a PCI or USB bus and in some cases to an on-board PPC (C++) interfacing to the FPGA registers, that ultimately drove HW components. • Design, prototype, project lead and product development for high performance spectrum analyzer with acquisition bandwidth of 1GS/s or 4GB/s data rate. This data is then written to a circular buffer with multiple clients running simultaneously. These clients include: real-time DPX processing using a highend GPU, deferred time processing to numerous legacy frequency & time domain measurements, writing full data rate samples to a HW RAID, streaming samples to a user supplied application using a shared memory approach and streaming samples via 40Gbe to off system user supplied application. • Implemented FPGA code in Verilog to generate a library of RF modulated signals. • Ported FPGA design from an earlier USB spectrum analyzer to a later model and incorporated new HW components and features. Show less

    • Sr. Software Design Engineer
      • Mar 2006 - Jan 2009

      Worked for the Beaverton based Wireless Field Test engineering group. This group develops test equipment for cell tower installation and maintenance. During this time I was responsible for new platform CPU evaluation, product development/architecture, and manufacturing line process improvement. The product is divided into three major sub-systems RF hardware, DSP/FPGA hardware/firmware, and a host processor application. The host processor (PXA255) was the greatest bottleneck to system performance. During the evaluation process I looked at several newer systems including the Marvel PXA320, Freescale iMX31, and Intel Atom. I also looked at WinCE, WinXP embedded and WinXP professional. The current code base was targeted primarily for WinCE. I used various performance criteria but the best and most convincing was to run our application on the different systems. Part of my job during the evaluation process was to port the code base and projects to the different processors and environments. Another task I accomplished was to wrap the SPI interface to the hardware with a socket connection. This allowed remote communication to the module hardware and as a side effect allow me to do apple-to apple comparisons of different systems running true hardware. I was called in to help with product development as more and more resources were required. During this time I was responsible for all aspects of the product including GPS, system measurements, UI design, database editor (SQLite), and printing.The manufacturing process to calibrate and QC the module hardware was quite extensive taking on the order of 17 hours to complete. This is primarily due to the lack of performance of the host processor. I incorporated the remote hardware interface that I used for CPU evaluation. This allowed manufacturing to utilize a desktop version of the application directly interfacing to module hardware. As a result I was able to cut the manufacturing time in half. Show less

    • SW/HW Design Engineer IV
      • Oct 2000 - Mar 2006

      During this time I was the software architect for the Beaverton based Video Product Line engineering group. I was responsible for research and justification for the next generation of portable waveform monitors. This justification involved comparisons for time-to-market, feasibility, and cost estimations on possible architectures. During this project I was heavily involved with system design, embedded product development, and supplying advice to peer developers. In the last five years I have been involved with project leadership, mentoring junior engineers, product design/development, and problem solving/troubleshooting to follow-on products. Some projects include the first software only waveform monitor, real-time video quality analysis software intended for quality assurance of consumer set-top box manufacturing, and system design for an advanced video quality software application. Show less

    • SW/HW Design Engineer III
      • Jan 1997 - Oct 2000

      I was project lead and design engineer on a refit project for a video quality analysis application to an upgraded platform. This involved a faster host processing system coupled to DSP hardware. Tasks included development on a Windows NT host processor, ioctl interface to the DSP cards over a PCI bus, user interface rework, task scheduling, core team participation, and process documentation.User interface design engineer for a real time video quality monitoring product using Visual Studio and Java. This was the first product within Tektronix to employ Java as part of the design. Show less

    • SW/HW Design Engineer II
      • Jul 1991 - Jan 1997

    • SW/HW Design Engineer I
      • Aug 1989 - Jul 1991

    • Engineering Assistant
      • Nov 1988 - Aug 1989

    • Electronic Technician II
      • Jun 1987 - Nov 1988

    • Electronic Technician I
      • Sep 1979 - Jun 1987

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