Ernesto A. Molina Iñigo

Senior Electrical Design Engineer at Sigma Connectivity
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Contact Information
us****@****om
(386) 825-5501
Location
Sweden, SE

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Experience

    • Sweden
    • Telecommunications
    • 200 - 300 Employee
    • Senior Electrical Design Engineer
      • Jan 2023 - Present

    • Mexico
    • Appliances, Electrical, and Electronics Manufacturing
    • 1 - 100 Employee
    • Senior Embedded System Engineer
      • Sep 2019 - Present

      A great challenge to design a board with different options, using power electronics (Switching using TRIACS, control based on single Microcontroller and other version based on processors that run on SDRAM memory and their flash). Connecting different bridges is possible to interconnect the layouts. Integration of systems RTOS, which includes Bluetooth 5.0 communication using MESH architecture, considering a link with cloud infrastructure to interact like IoT network. Design of hardware architecture to embedded Microcontrollers (CortexM0, CortexM4), and Processors (Cortex A7) considering wireless interfaces that manage Bluetooth 5.0 and WiFi connections. High-Speed serial interfaces connected on devices to interact on PCB using eight layers and fast DDR3 memory. Software integration to analyze the image in real-time supported by C++ and Artificial Intelligence adapting new control methods and connectivity with Google Cloud supported by MySQL. Integration of Software security using BlockChain Methodology to communicate Server and HUBs troughs IoT. Including share memory for multiprocessing tasks that communicate frames. Power Factor correction, considering Cortex A7 platforms and their power electronics systems, connected to AC source directly. LED boards management considering High-Speed Interfaces (SPI), avoids frequencies of clicking and connected with HighSpeed Mosfet. Show less

  • CookFlyer
    • Monterrey, Nuevo León, Mexico
    • Head of Internet of Things
      • Jan 2021 - Jan 2023

  • Byour Technologies
    • Monterrey Area, Mexico
    • Electric Car Designer
      • Oct 2018 - Sep 2020

      Considering a new way to provide energy, a new design of a vehicle that does not require gasoline or batteries. Exclusive method to manage electric motor not using recharged elements. .- Design of power systems (Motor Control 3 phases), using IGBT, FPGA, and CPLD. .- A novel way to control energy considering a smart system that runs RTOS using Yocto. .- Integration Wireless Interface considering 802.11 and Bluetooth Low Energy. .- Protocol to communicate using an option of OBD (On-Board Communication) with the two-wire interface. Show less

    • United States
    • Aviation & Aerospace
    • 700 & Above Employee
    • Senior System Designer
      • Mar 2019 - Sep 2019

      Design of Systems considering green technologies that includes energy, image processing, network communication through embedded systems to complete new ways of harvest fruit. Using an RTOS created in YOCTO with capabilities to run matched on FlytOS, was possible implement scripts based on Python 3.0, running image analysis Tensor Flow and C++ to detect states on real time. The system has included MIPI interface connected with an external camera, on a PCB with restricted area, then is necessary to create layout and hardware integration based on 0201 and 01005 device sizes. Great Signal Integration SNI obtained considering LORA wireless interface and DDR2 memory for iMX6 core processor. No issues about ESD and EMC evaluations, with these layout that includes a 6 layers architecture. Show less

    • United States
    • Software Development
    • Senior Firmware Engineer
      • Jan 2019 - Apr 2019

      A freelance project with firmware development based on ESP32 hardware and IDF packages. Considering C language and connections with Micopython to run Bluetooth LE with all their parameter modifications through structures interfaced from high level. A freelance project with firmware development based on ESP32 hardware and IDF packages. Considering C language and connections with Micopython to run Bluetooth LE with all their parameter modifications through structures interfaced from high level.

    • United States
    • Semiconductor Manufacturing
    • 700 & Above Employee
    • Senior Software Engineer
      • Apr 2018 - Dec 2018

      Considering a XILINX platform, a firmware developed with C language driving an I2C Multimaster mode working at 1MHz, connected to Python Framework and inject data from simulation models that are executed on a Cortex-M4 architecture Design a firmware C code managing the data processing using three masters on I2C bus and SPI interface that connects the flash memory running with STM32L4 board with strategy FMC (Flexible Memory Controller) that manages some data of MIPI interface. A parallel process was executed running specific declaration on SCATTER configurations for system access to insert data directly on memory and provide exclusive driver using Pylink methodologies. A python Framework runs directly to manage ETM and ITM interfaces that provides a parsing method automated that share the status of performance on specific peripherals connected to DMA of the system. The python scripts obtain data on real time to be processed by a server on Jenkins that executes a test framework and report results directly to tracker dashboard “Agile Methodology Show less

    • United States
    • Telecommunications
    • 500 - 600 Employee
    • Senior Electrical Designer
      • Mar 2015 - Apr 2018

      Design systems with better performance of Electrical and Firmware Features. Design an embedded system using CORTEX-M3/CORTEX-M4 Family and their peripherals integration of serial high speed based in PSOC 5 Cypress Devices. System of Image Processing with profile to automate human actions designing with CORTEX A5 processor mounted in a YOCTO distribution, with protocols IUT-R BT.656 to process images in real time using Artificial Intelligence (Neural Networks). Framework of Automation with diverse Instrumentation of measure efficiency on hardware devices running and catching parameters on real time. Schematic capture and Design Low Power Systems considering, USB interfeaces with great Signal Integrity coupled to high speed protocols. Layout Design with focus and great results about ESD / EMI, with specific strategies to solve issues based on HyerLynx. Show less

    • United States
    • IT Services and IT Consulting
    • 700 & Above Employee
    • Embedded / Kernel Integration Engineer
      • Sep 2012 - Mar 2015

      Electrical Engineer looking devices performance on telecommnications field for host virtual systems ( THIN-CLIENT ), providing modifications to the Kernel System Integration (arch) (mm). Kernel 3.3 adaption with XILINX Virtex 6(FPGA) architecture, using IP for DSP and ARM core Cortex. Test of firmware based on C, using Python language with Linux OS and unittest framework. Integration of ARM Architecture Cortex A9 for video analysis and discrete methods of signal processing. Drivers developing of high speed transfer for PCI express and GiGE. Debug with dynamic analysis for Cache Memory Level 2 (L2). Sockets drivers for networking communications and IRQ synchronization. Show less

    • Mexico
    • IT Services and IT Consulting
    • 1 - 100 Employee
    • Embedded Systems Designer
      • Feb 2014 - Aug 2014

      Design a modem to review and analyze every image or video that a local network receive or send through IPV4 or IPV6 and avoid pornography . The main analysis process was executed using a DSP C6000, to review with digital filters and syncrhonization of pipelines. A wide training of neural network was exectuted to evaluated the images using wavelets. An exclusive kernel with modifications to the NET and VIDEO section were applied to extract from SKBuffer to review information before that IPC (Coordinator) receive data. Show less

  • Brain Computer Interface
    • Greater San Diego Area
    • Hardware/Firmware Design
      • Jul 2011 - Sep 2012

      Development of system to integrate signal analysis from brain cortex on real time, with the objective of signal detection and their interface to embedded system. Scanning the brain activity and seizures effects. .- Integration of drivers with OS. .- Designer of embedded systems customizing the Linux kernel, providing better performance to some fixed hardware architecture. .- Using ARM like target architecture, designing the systems with better memory performance and execution cycles to coordinate the peripherals ( SDIO & Bus Bridge). .- Implementing the Buildroot platform to create the Kernel and the root image. .- Selection of libraries to action performance within the RTOS. Show less

    • United States
    • Semiconductor Manufacturing
    • 700 & Above Employee
    • Embedded Systems Engineer
      • Mar 2011 - Sep 2012

      Member of the Hardware foundations and sustaining team on embedded systems. Activities related in performance of the processor ARM9 and their interconnectivity on the ASIC embedded with the Software application based in Java and C language. Looking the performance of the memory and the Bus interconnections (SDIO and 802.11g), including the firmware of signal processor based on TMS320C6XX. In this position some challenges has been made are: .- Management of Java on Real time to reduce the read/write memory cycles and latency to provide data, using JRSI. .- Labview Interface Implementation to read and diagnostic the hardware status (Memory Buffer, GPIO States,Bus Interconnections, I+D caches ), matched with the Trace32 debugger. .- The design of a dual core for prototype with NIOS II processor integrated in a FPGA cyclone IV with DDR3 memory interface for a Tablet system. Show less

Education

  • Instituto Politécnico Nacional
    Master of Science, Digital Systems Design
    2010 - 2011
  • Instituto Politécnico Nacional
    Master Engineering, Embedded Systems
    2009 - 2010
  • Instituto Tecnologico de Tijuana
    Bachelor of Science, Electrical Engineering
    1997 - 2002

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