Eloisa Mutuc

Reliability Engineer at PCI Limited
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Contact Information
us****@****om
(386) 825-5501
Location
SG

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Experience

    • Singapore
    • Appliances, Electrical, and Electronics Manufacturing
    • 300 - 400 Employee
    • Reliability Engineer
      • Apr 2015 - Present

      - Responsible on products regulatory certification applications to different global market access such as FCC (US), IC (Canada), VCCI (Japan). - Responsible on products safety mark such as UL mark, TUV, VCC, KCC. - Prepare MTBF prediction data, design / process FMEA, design / process FMECA of electronics products. - Prepare and execute qualification test plan including qualification testing, ORT HALT and HASA. - Support design engineer on DVT (design verification testing) both electrical and mechanical. - Perform cross section process concerning new process evaluation, new supplier evaluation, new product evaluation and failure analysis.

    • Philippines
    • Appliances, Electrical, and Electronics Manufacturing
    • 100 - 200 Employee
    • Senior LSI Development Engineer / LSI Development Engineer
      • 2012 - Feb 2015

      - IC developer specifically Motor Driver ICs from design stage to manufacture transfer. Perform design review: circuit design review, IC mask layout design review, design sample review and yield analysis.- Develop new circuit functions as per customers specifications and requirements. - Perform design circuit verification through simulation- Perform design sample verification through actual test bench setup to validate its electrical performance and perform extremes evaluations. Prepare test profiles.- Liaise with teams/department relative to the design stage.

    • Design Verification Engineer
      • 2010 - 2012

      - involves verification of IC designs through simulations at different conditions (typical and worst-case conditions)- involves verification of IC samples in a actual test bench setup to validate actual performance of IC

    • Reverse Engineer
      • Jul 2008 - Apr 2010

      - Translating competitor's IC mask layout circuit into equivalent schematic circuitry. - Able to identify / classify each mask layout components.

Education

  • University of the East
    Bachelor of Engineering (B.Eng.), Electronics and Communication Engineering
    2002 - 2007

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