Mohammed Eladawy

Verification Engineer at Semidynamics Technology Services
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Contact Information
us****@****om
(386) 825-5501
Location
Egypt, EG

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Experience

    • Spain
    • Semiconductors
    • 1 - 100 Employee
    • Verification Engineer
      • Mar 2023 - Present

    • South Korea
    • Semiconductor Manufacturing
    • 1 - 100 Employee
    • Senior Research Engineer at siliconarts, In (Hardware team)
      • Jan 2022 - Feb 2023

      • Working with digital design/verification team on developing and verifying GPGPU based on RISCV architecture. • Verifying RTL unit-level and IP-level against reference C/C++ model. • Working closely with software team on testing C-kernel and OpenCL application on FPGA • Following up with frontend and backend team to resolve linting, synthesis and implementing issues • Working with digital design/verification team on developing and verifying GPGPU based on RISCV architecture. • Verifying RTL unit-level and IP-level against reference C/C++ model. • Working closely with software team on testing C-kernel and OpenCL application on FPGA • Following up with frontend and backend team to resolve linting, synthesis and implementing issues

    • Senior Digital Design/Verification and FPGA prototyping Engineer
      • Sep 2020 - Dec 2021

      • Extracting specifications from standards, design, and customer requirements. • Performing research activities whenever needed to find the best architecture for the target designs. • Leading the projects in architecture, design reviews, and conducting peer reviews on the designs of other designers. • Lead the projects in design and verification plans to deliver the project within the specified deadline. • Taking the lead in analyzing and solving IPs and system-level issues until resolution and closure. • Overseeing the top/block-level verification and debugging failing test Cases on module level and SoC top level. • Following up with the front-end design team to resolve synthesis and linting issues. • Performing ASIC synthesis and GLS verification for a different RTL design module. Show less

    • Digital Design/Verification and FPGA prototyping Engineer, Wasiela company
      • Apr 2015 - Feb 2020

      • Performing bring-up, debug, and validation of designs to achieve functional and performance goals. • Transforming Matlab/C system model to efficiently synthesizable RTL code. • RTL design, implementation, and verification (functional and Gate Level Simulation verification) for communication systems modules using Verilog HDL. • Synthesizing, implementing, and solving static timing analysis problems using Xilinx FPGA design flow. • Documentations of functional and design specifications using LATEX tools. • Designing and developing a System on Chip (SoC) using Vivado tool on Xilinx FPGA used for demos and verifications. • Designing and developing low-level software for interfacing with FPGA-based designs and developing C/C++ code for FPGA peripheral. • Report the status of the assigned tasks to the direct manager/leader. Show less

    • Egypt
    • Higher Education
    • 700 & Above Employee
    • Lab engineer
      • Feb 2012 - Mar 2015

      • Supporting teacher assistance team in computer science Lap. • Supporting teacher assistance team in computer science Lap.

Education

  • Cairo University
    Master's degree, Electrical, Electronics and Communications Engineering
  • Cairo University
    Bachelor's degree, Electrical, Electronics and Communications Engineering
    2006 - 2011
  • Ras Al Khaimah Secondary School
    High School/Secondary Certificate Programs, Very good
    2003 - 2006

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