Dmitry Smekhov
part-time Xilinx instructor at Inline Group- Claim this Profile
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Bio
Kate Martin
Dmitry was a client of mine @ PLDA who designed an original technical solution based on our PCIe IP controller EZDMA for Xilinx FPGA’s. He went on to present this solution at the 2009 IP-Embedded System Conference, Grenoble, France. This White Paper can be reviewed here: http://ds-dev.ru/attachments/3/IPESC09_id21.pdf. Dmitry has strong knowledge of PCI Express and designing complex FPGA projects. In order to share his knowledge with the PCIe field he has opened projects for PCI Express v1.1 x8 (v2.0 x4) as OpenSource which are available on sites opencores.org and ds-dev.ru http://opencores.org/project,pcie_ds_dma http://ds-dev.ru/projects/ds-dma/wiki/English Dmitry would be an asset to any company looking for an experienced FPGA design engineer.
Kate Martin
Dmitry was a client of mine @ PLDA who designed an original technical solution based on our PCIe IP controller EZDMA for Xilinx FPGA’s. He went on to present this solution at the 2009 IP-Embedded System Conference, Grenoble, France. This White Paper can be reviewed here: http://ds-dev.ru/attachments/3/IPESC09_id21.pdf. Dmitry has strong knowledge of PCI Express and designing complex FPGA projects. In order to share his knowledge with the PCIe field he has opened projects for PCI Express v1.1 x8 (v2.0 x4) as OpenSource which are available on sites opencores.org and ds-dev.ru http://opencores.org/project,pcie_ds_dma http://ds-dev.ru/projects/ds-dma/wiki/English Dmitry would be an asset to any company looking for an experienced FPGA design engineer.
Kate Martin
Dmitry was a client of mine @ PLDA who designed an original technical solution based on our PCIe IP controller EZDMA for Xilinx FPGA’s. He went on to present this solution at the 2009 IP-Embedded System Conference, Grenoble, France. This White Paper can be reviewed here: http://ds-dev.ru/attachments/3/IPESC09_id21.pdf. Dmitry has strong knowledge of PCI Express and designing complex FPGA projects. In order to share his knowledge with the PCIe field he has opened projects for PCI Express v1.1 x8 (v2.0 x4) as OpenSource which are available on sites opencores.org and ds-dev.ru http://opencores.org/project,pcie_ds_dma http://ds-dev.ru/projects/ds-dma/wiki/English Dmitry would be an asset to any company looking for an experienced FPGA design engineer.
Kate Martin
Dmitry was a client of mine @ PLDA who designed an original technical solution based on our PCIe IP controller EZDMA for Xilinx FPGA’s. He went on to present this solution at the 2009 IP-Embedded System Conference, Grenoble, France. This White Paper can be reviewed here: http://ds-dev.ru/attachments/3/IPESC09_id21.pdf. Dmitry has strong knowledge of PCI Express and designing complex FPGA projects. In order to share his knowledge with the PCIe field he has opened projects for PCI Express v1.1 x8 (v2.0 x4) as OpenSource which are available on sites opencores.org and ds-dev.ru http://opencores.org/project,pcie_ds_dma http://ds-dev.ru/projects/ds-dma/wiki/English Dmitry would be an asset to any company looking for an experienced FPGA design engineer.
Credentials
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Convolutional Neural Networks
Coursera Course CertificatesJun, 2019- Oct, 2024 -
Sequence Models
CourseraJun, 2019- Oct, 2024 -
Математика и Python для анализа данных
Coursera Course CertificatesMay, 2019- Oct, 2024 -
Advanced SDSoC Development Environment and Methodology
Inline Group CTC - Xilinx Authorized Training ProviderJan, 2019- Oct, 2024 -
Уровень владения английским: Начинающий (приблизительно)
DuolingoFeb, 2016- Oct, 2024
Experience
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Inline Group
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Russian Federation
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IT Services and IT Consulting
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100 - 200 Employee
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part-time Xilinx instructor
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Oct 2019 - Present
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FPGA Design Engineer
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Sep 2020 - Present
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Grovf
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United States
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IT Services and IT Consulting
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1 - 100 Employee
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FPGA Design Engineer
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Apr 2022 - Aug 2022
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Head of DSP laboratory, FPGA designer
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Jan 2013 - Sep 2020
FPGA projects for interface with:- High-speed analog-to-digital converter- PCI Express- Digital Signal Processor- FMC carrier boardFPGA: Virtex 4, Virtex 6, Virtex 7, Spartan 3, Spartan 6, Kintex 7, Kintex Ultrascale, ZynqPCI Express controller on Xilinx IP CorePCI Express v3.0 x16 on Xilinx Virtex 7SDAccelTest software
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Chief designer of FPGA direction
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Feb 2018 - Aug 2020
Main goals are research new technologies as 10G, 100G Ethernet, SDAccel, SDSoC, Zynq, Zynq Ultrascale+
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Engineer - FPGA designer
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Jan 2001 - Jan 2013
FPGA project for interface with:- High-speed analog-to-digital converter- PCI Express- Digital Signal ProcessorFPGA: Virtex 4, Virtex 5, Virtex 6, Spartan 2E, Spartan 3, Spartan 6, Kintex 7PCI Express controller on Xilinx and PLDA IP CoreTest software
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software engineer
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Feb 1999 - Dec 2000
software for measuring stands software for measuring stands
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Education
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1989 - 1995
Moscow State Institute of Radio Engineering, Electronics and Automation (Technical University)
engineer-electronic
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