Debasmita Shaw, PhD
CEO & Founder at Divsoft Solutions- Claim this Profile
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Bio
Experience
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Divsoft Solutions
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Software Development
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1 - 100 Employee
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CEO & Founder
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May 2016 - Present
I am currently setting up a new office in the Kolkata region and looking for experienced professionals in the domain of imaging software and embedded products. We are hiring mid-senior level engineering positions with imaging and/or embedded software experience. I am currently setting up a new office in the Kolkata region and looking for experienced professionals in the domain of imaging software and embedded products. We are hiring mid-senior level engineering positions with imaging and/or embedded software experience.
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Atria Logic Inc.
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United States
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Semiconductor Manufacturing
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1 - 100 Employee
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VP Engineering Software
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Oct 2014 - Jul 2015
Taken a new initiative to build multimedia solutions with heterogeneous processing (multi-core, DSP, GPU, HW engine) on embedded platforms. Solutions include audio, vision, video analytics and AVB connectivity targeting for home automation and automotive market segments. Taken a new initiative to build multimedia solutions with heterogeneous processing (multi-core, DSP, GPU, HW engine) on embedded platforms. Solutions include audio, vision, video analytics and AVB connectivity targeting for home automation and automotive market segments.
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Toshiba India Pvt. Ltd.
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India
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Information Technology & Services
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500 - 600 Employee
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Head Of Engineering Multimedia
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Aug 2003 - Mar 2014
• Provided Program Leadership for DTV solutions deliveries from 2009 till 2013 Global market • Executed 2014 HDTV solution on multicore with scalable series (Half HD, SmartTV) of SoCs • Product planning and execution for WiFi with Graphics and Full HD based solution for Tablet, PC with Content Protection Feature (HDCP); Product solutions for automotive 802.11a/b/g/n/ac, WiFi Direct Miracast & Mirrorlink+HTML-5, BLE • Managed Applications for Transfer Jet high speed file transfer protocol, eMMC, BT+NFC, WAPI+WiFi with NSM security(SATA, SD-card) • Program management for SSD Controller (OEM specific) and firmware projects (wear leveling, write gathering, Garbage collection/de-fragmentation with mirroring) • Program management for Smart card solutions for mobile NFC, USAT, financial and government IDs • Directed IP Solutions for Stereo Camera Calibration, Blind Spot Detection, Lane, Pedestrian Detection • Architected product for Gesture Recognition for Smart TV and Gaming solutions Show less
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Micronas
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China
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Mining
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Product Manager
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Feb 2002 - Aug 2003
• Dynamic & Interactive Diagnosis tool to check OS elements viz. threads, queues, semaphores, memory details – deadlocks, memory leaks, overflow/underflow of tasks management in real-time system. • Product Architecting DTV, STB solution with MPEG-2 video and 5.1 Dolby audio • Designed key elements: memory manager, Master processor coordination, AV sync design, • Designed and managed projects on Time-shift Recording, IPTV, Video-On-Demand features • Dynamic & Interactive Diagnosis tool to check OS elements viz. threads, queues, semaphores, memory details – deadlocks, memory leaks, overflow/underflow of tasks management in real-time system. • Product Architecting DTV, STB solution with MPEG-2 video and 5.1 Dolby audio • Designed key elements: memory manager, Master processor coordination, AV sync design, • Designed and managed projects on Time-shift Recording, IPTV, Video-On-Demand features
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Infineon Technologies
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Germany
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Semiconductor Manufacturing
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700 & Above Employee
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Product Manager
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Jul 2000 - Feb 2002
• Architecting and designing for HDTV, DVD set-top box, Video recorders, Encryption Technologies & various security systems. (this division of Infineon was taken by Micronas Gmbh. later)• Project management for DTV functions – multi tuner – play/record, PiP, Advanced PVR with time-shift, export/import features play/record delayed play, on-spot, scheduled & series recording etc.• Outsourced and controlled DVB-MHP 1.02/1.03 with security & clean-room JVM implementation• Defined the product concepts for Video phone with streaming, conferencing, image and HiFi audio processing, compatible with 3G, 2.5G, 2G Baseband processing• Contributed in Infineon scalable back-bone architecture design for 2.5G, 3G for baseband and multimedia side – audio, video streaming, compression, decompression and related various signal processing algorithms in high-end multi-core solution for OFDM, QAM for GPRS, EDGE, UMTS Show less
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Principal Design Engineer
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Aug 1999 - Jul 2000
• Proprietary Bus architecture design for mobile platform SoC supporting scalable architecture• Project management for Device Drivers for Peripheral Devices viz. I2C, HW accelerators, LCDs, Camera-IC, ADC, Memory controller.• Flash controller design with virtual simulation of 2/4-way cache for performance enhancement• Memory partitioned with virtual segmentation controller design for 128-byte parallel data access• Managed projects of MPEG2, MP3, Dolby AC3 on Infineon DSP core targeting mobile and DTV SoCs.• Architected Baseband Layer-1 GSM, EDGE, 2G/3G with DSP algorithm implementation on DSPs Show less
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DSP DIVISION LEADER
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May 1998 - Aug 1999
• Developed Baseband DSP firmware for UMTS, GPRS, EDGE, GSM development (2G, 2.5G and 3G)• Managed projects for MPEG-2, 4, H.264, WMV, RV, AC97, AC3, AAC, MP3, WMA etc.• Complexity comparisons of standards like H.324, MPEG1, MPEG2 on different DSP architectures• PVR, CCD, Teletext, Sub-title of DVB std on Infineon microcontroller and DSPs for DTV application
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Peritus
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Iceland
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IT Services and IT Consulting
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1 - 100 Employee
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PROGRAM MANAGER
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Jan 1998 - May 1998
• Modularized Database with Object Oriented design for storage solutions • Managed project for application development for distributed database system • Modularized Database with Object Oriented design for storage solutions • Managed project for application development for distributed database system
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Texas Instruments
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United States
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Semiconductor Manufacturing
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700 & Above Employee
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Project Leader, IC Design Engineer
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Feb 1991 - Jan 1998
• Developed Color Printer (DLP) embedded software on Rasterizing Image Processing algorithms • Designed Tile memory for efficient transfer controller (like DMA) for high bandwidth video data access • Optimized image, video, text & audio firmware on TI Multimedia processors and DSP • Implemented Design Compiler for Design Processes upto 5 layers with graph topology • Modified VHDL compiler script for DFT/SFT • Developed Color Printer (DLP) embedded software on Rasterizing Image Processing algorithms • Designed Tile memory for efficient transfer controller (like DMA) for high bandwidth video data access • Optimized image, video, text & audio firmware on TI Multimedia processors and DSP • Implemented Design Compiler for Design Processes upto 5 layers with graph topology • Modified VHDL compiler script for DFT/SFT
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Education
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IIT Kharagpur
Doctor of Philosophy (PhD), Computer Engineering -
Jadavpur University
Master's degree, Computer Engineering