Experience

SEAKR Engineering, LLC

• United States
• Defense and Space Manufacturing
• 300 - 400 Employee

• RTL Design Engineer

  • Feb 2020 - Present

  RTL design. JESD204b/c. FPGA Emulation. Xilinx UltraScale+ RTL design. JESD204b/c. FPGA Emulation. Xilinx UltraScale+



Nokomis, Inc.

• United States
• Defense and Space Manufacturing
• 1 - 100 Employee

• FPGA / ASIC Design and Verification Engineer - Consultant

  • Feb 2019 - Jan 2020

  Verilog and VHDL. Xilinx RFSoC and ZCU111. Mercurial Revision Control. Verilog and VHDL. Xilinx RFSoC and ZCU111. Mercurial Revision Control.



Northrop Grumman

• United States
• Defense and Space Manufacturing
• 700 & Above Employee

• ASIC/FPGA Design and Verifcation Engineer - Consultant

  • Mar 2018 - Jan 2019

  Design and Verification of Radiation tolerant ICs. Design and Verification of Radiation tolerant ICs.



Mercury Systems

• United States
• Defense and Space Manufacturing
• 700 & Above Employee

• ASIC/FPGA Design Engineer - Consultant

  • Aug 2017 - Mar 2018

  RapidIO design and verification. SSD design using NAND Flash. RapidIO design and verification. SSD design using NAND Flash.



SpaceX

• United States
• Aviation and Aerospace Component Manufacturing
• 700 & Above Employee

• Systems/ASIC/FPGA Design and Verification Engineer - Consultant

  • Feb 2017 - Aug 2017

  ASIC/FPGA Design and Verification. ASIC/FPGA Design and Verification.



Boeing

• United States
• Aviation & Aerospace
• 700 & Above Employee

• Systems/ASIC Design and Verification Engineer - Consultant

  • Oct 2016 - Feb 2017

  ASIC Verification using SystemVerilog and UVM. ASIC Verification using SystemVerilog and UVM.



Lockheed Martin

• United States
• Defense and Space Manufacturing
• 700 & Above Employee

• FPGA/ASIC Design and Verification Engineer - Consultant

  • Sep 2015 - Sep 2016

  FPGA Design and Implementation of a JESD204b interface. Conversion to SystemVerilog and full chip integration. FPGA Design and Implementation of a JESD204b interface. Conversion to SystemVerilog and full chip integration.



SEAKR Engineering, LLC

• United States
• Defense and Space Manufacturing
• 300 - 400 Employee

• Systems/FPGA/ASIC Design Engineer - Consultant

  • Aug 2014 - Aug 2015

  ASIC / FPGA Architecture, Design, and Implementation. ASIC / FPGA Architecture, Design, and Implementation.



Lockheed Martin

• United States
• Defense and Space Manufacturing
• 700 & Above Employee

• FPGA Design and Verification Engineer - Consultant

  • Sep 2013 - Jul 2014

  Xilinx Zynq. Vivado. SystemVerilog. Servo loops. Video. Xilinx Zynq. Vivado. SystemVerilog. Servo loops. Video.



SEAKR Engineering, LLC

• United States
• Defense and Space Manufacturing
• 300 - 400 Employee

• Systems and FPGA/ASIC Engineer - Consultant

  • Aug 2011 - Sep 2013

  Systems Engineering, ASIC, and FPGA Design Engineer. RapidIO. High Speed SERDES. Architecture modeling using SystemC. SystemVerilog. Systems Engineering, ASIC, and FPGA Design Engineer. RapidIO. High Speed SERDES. Architecture modeling using SystemC. SystemVerilog.



Accelogic

• Weston, Florida

• FPGA Design Consultant

  • May 2011 - Aug 2011

  FPGA design for High Performance Computing using Xilinx FPGAs. Mercurial revision control. FPGA design for High Performance Computing using Xilinx FPGAs. Mercurial revision control.



Ciena

• United States
• Telecommunications
• 700 & Above Employee

• Principal Hardware Engineer

  • Dec 2006 - Feb 2011

  High Speed FPGA Design. Fiber Optic Transponder interfaces FPGAs. Multi-Gigabit SERDES interfaces. Altera FPGAs. OTN GbE. Verilog, VHDL, SystemVerilog. Line card FPGA design. Modelsim, Questa, Synplify Pro, Perforce revision control. High Speed FPGA Design. Fiber Optic Transponder interfaces FPGAs. Multi-Gigabit SERDES interfaces. Altera FPGAs. OTN GbE. Verilog, VHDL, SystemVerilog. Line card FPGA design. Modelsim, Questa, Synplify Pro, Perforce revision control.



Honeywell

• United States
• Appliances, Electrical, and Electronics Manufacturing
• 700 & Above Employee

• ASIC/FPGA Designer

  • Sep 2001 - Dec 2006

  ASIC/FPGA design. VHDL. RapidIO. IEEE1394b. Space Shuttle Health Monitor Computer. HDLC Controller. PCI bus. High Speed SERDES bert design. VHDL based verification. RCS, CVS, and Subversion revision control. DC compiler. Synplify Pro. Modelsim. PrimeTime. Formality. HPUX. Linux. ASIC/FPGA design. VHDL. RapidIO. IEEE1394b. Space Shuttle Health Monitor Computer. HDLC Controller. PCI bus. High Speed SERDES bert design. VHDL based verification. RCS, CVS, and Subversion revision control. DC compiler. Synplify Pro. Modelsim. PrimeTime. Formality. HPUX. Linux.



Digital Lightwave

• United States
• Telecommunications
• 1 - 100 Employee

• FPGA Design Engineer

  • Apr 1996 - Sep 2001

  SONET FPGA design. OC48. OC192. Test Equipment. BERT. PRBS. VHDL based verification. SONET FPGA design. OC48. OC192. Test Equipment. BERT. PRBS. VHDL based verification.



Texas Instruments

• United States
• Semiconductor Manufacturing
• 700 & Above Employee

• Board Design and EO Test Engineer

  • Jan 1992 - Apr 1996

  Digital Light Processing Group (DLP) Board design. Electro-Optic Design and Test. Board redesign of a micro controller based illumination system with optical feedback and a CAN bus. Optical feedback calibration algorithm work. Frame grabber based optical alignment system work for illumination and DMD alignment. PLD design using VHDL. Established VHDL methodology for the group. Reliability Engineer - Dallas IC Package Qualification Labs SAM Imaging, X-Ray, ESD, Latch-Up, Radiation Leak Testing, Shock, Vib, Thermal Cycle.



Engineering Technology, Inc.

• Orlando, Florida Area

• Project Engineer

  • Jun 1988 - Jan 1992

  Project Engineer. Materials testing. Optics. Design Technician. Electrical and Electronic prototype assembly. Test chamber assembly. Instrumentation electronics. Data acquisition assembly and wiring. Multi-discipline integration. Clearance: TS Project Engineer. Materials testing. Optics. Design Technician. Electrical and Electronic prototype assembly. Test chamber assembly. Instrumentation electronics. Data acquisition assembly and wiring. Multi-discipline integration. Clearance: TS