Colm Ó Faoláin
Deep Learning Validation Engineer at Intel Movidius- Claim this Profile
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English Native or bilingual proficiency
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Irish Native or bilingual proficiency
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French Elementary proficiency
Topline Score
Bio
Credentials
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Practical Deep Learning
DoulosMar, 2019- Sep, 2024 -
Gaisce Bronze Award
Gaisce - The President's AwardSep, 2008- Sep, 2024
Experience
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Deep Learning Validation Engineer
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Aug 2017 - Present
Currently working as a Deep Learning Validation Engineer on Intel Movidius' AI portfolio. This has included constrained random stimulus testing in UVM and System Verilog at block level and directed embedded software testing in C at full chip level. I have also worked on Movidius' IP projects delivering soft IP drops into the wider Intel teams in other business units. In this role I have achieved the following. - Completed Doulos Practical Deep Learning Training Course, gaining experience in the following topics: Python, Numpy, Matplotlib, TensorFlow, Keras, Linear/Non-linear Regression, Logistic Regression, Non-linear Classification, CNNs and more - Embedded software validation in C of the multi-core boot flow for all processor types on the SoC and of the inter-processor communication flow for all software based tests. - Constrained random verification of CNN, Image Compression, S-LVDS camera and CMX memory blocks at unit level - Validation owner for ROM boot flow using the USB 2.0/3.1 fastboot protocol - Led group of 7 to overhaul, redevlop and restructure the training program for new hires into the group - Led conversion initiative of System Verilog SoC level testbench to a UVM compliant testbench including the creation of class based UVM collateral (agents, sequences etc.) - Delivery and integration of Movidius Soft IP into larger Intel SoC teams - Developed verification plan documentation for Movidius' Soft IP cluster. Show less
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Intel Corporation
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United States
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Semiconductor Manufacturing
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700 & Above Employee
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Pre-Silicon Validation Engineer
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Sep 2016 - Jul 2017
Worked as a Pre-Silicon Validation Engineer for Intel's Internet of Things and Wearables Group (IWG). This work involved the verification of RTL blocks by identifying bugs in RTL designs and then working closely and collaborating with the RTL team to fix these bugs to ensure functionally correct designs for Intel's wearable SoCs. In this role I my major achievements were: - Co-author on a paper awarded ‘Best of Published’ status at an internal conference detailing the conversion of legacy testbenches from OVM to UVM - Design of verification components and testbenches in SystemVerilog - Verification of unit level, cluster level and full SoC level through constrained random testing in UVM - Use of the verification methodologies OVM and UVM - Use of SystemVerilog Assertions (SVA) for use in formal verification - Linux / Unix - Python, Bash and Tcl scripting - Git/SVN Show less
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Pre-Silicon Validation Engineer Intern
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Jan 2015 - Aug 2015
Worked as a Pre-Silicon Validation Engineer for Intel's Internet of Things and Wearables Group (IWG). This work involved the trialling and integration of formal verification tools into the wider group's workflow and simulation based verification of an SRAM RTL blocks on a live SoC projects using various verification methodologies. Worked as a Pre-Silicon Validation Engineer for Intel's Internet of Things and Wearables Group (IWG). This work involved the trialling and integration of formal verification tools into the wider group's workflow and simulation based verification of an SRAM RTL blocks on a live SoC projects using various verification methodologies.
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Opening Minds Educational
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Ireland
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Retail
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1 - 100 Employee
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Retail Assistant
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Jun 2009 - Dec 2014
Worked part-time hours in the bookshop where I - Was fully till trained - Was responsible for handling the company cash intake at end of day. - Worked effectively with a team of staff during busy periods - Supervised delivery of stock and storage of same - Managed large orders both over the phone and in person - Provided excellent customer service Worked part-time hours in the bookshop where I - Was fully till trained - Was responsible for handling the company cash intake at end of day. - Worked effectively with a team of staff during busy periods - Supervised delivery of stock and storage of same - Managed large orders both over the phone and in person - Provided excellent customer service
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Education
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2014 - 2016
University College Dublin
Master of Engineering (M.Eng.), Electronic and Computer Engineering -
2014 - 2014
University of Connecticut
One Semester - Exchange Student, Electrical and Electronics Engineering -
2011 - 2014
University College Dublin
Bachelor of Science (B.Sc.), Electrical, Electronics and Communications Engineering -
2005 - 2011
Coláiste Eoin
Leaving Certificate, Gaeilge, English, Mathematics, Applied Mathematics, French, Physics, Chemistry, Economics
Community
