Chris Du
FPGA/ASIC Design Engineer at Rianta Solutions Inc.- Claim this Profile
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Experience
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Rianta Solutions Inc.
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Canada
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Semiconductor Manufacturing
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1 - 100 Employee
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FPGA/ASIC Design Engineer
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Feb 2021 - Present
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IGNIS Innovation Inc.
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Canada
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Semiconductor Manufacturing
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1 - 100 Employee
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FPGA Design Engineer
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Feb 2019 - Feb 2021
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AMD
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France
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Architecture and Planning
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1 - 100 Employee
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MTS Design Engineer
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Oct 2018 - Jan 2019
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EXFO
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Canada
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Telecommunications
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700 & Above Employee
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Principal FPGA Designer
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2017 - 2018
Designed and implemented EXFO's simulator engine on Altera Arria10 FPGA of Intel PAC COTS card with Network Functions Virtualization (NFV) technology.IP blocks design and verification. Designed and implemented EXFO's simulator engine on Altera Arria10 FPGA of Intel PAC COTS card with Network Functions Virtualization (NFV) technology.IP blocks design and verification.
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Senior FPGA Designer
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2013 - 2016
Designed and implemented EXFO's IMS media load testing engine on Xilinx FPGA of W2CM-10GbE card. Designed and implemented EXFO's IMS media load testing engine on Xilinx FPGA of W2CM-10GbE card.
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FPGA Designer
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2008 - 2012
Designed and implemented EXFO's IMS media load testing engine on Xilinx FPGA of MCM card. Designed and implemented EXFO's IMS media load testing engine on Xilinx FPGA of MCM card.
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Education
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Beijing Institute of Technology
Bachelor's degree