JiaNan Chen
RTL Design Lead at Cysic- Claim this Profile
Contact Information
us****@****om
(386) 825-5501
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Location
Hong Kong SAR, HK
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Experience
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Cysic
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United States
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Blockchain Services
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1 - 100 Employee
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RTL Design Lead
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Mar 2023 - Present
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DJI
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China
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Appliances, Electrical, and Electronics Manufacturing
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1 - 100 Employee
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RTL Design Engineer
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Apr 2022 - Mar 2023
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Hisilicon
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Semiconductor Manufacturing
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500 - 600 Employee
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RTL Design Engineer
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May 2020 - Apr 2022
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Intel Corporation
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United States
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Semiconductor Manufacturing
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700 & Above Employee
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RTL Design Engineer
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Jun 2019 - Mar 2020
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Education
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2018 - 2022
Technical University of Munich
Master's degree, Integrated Circuit Design -
2018 - 2020
Nanyang Technological University
Master's degree, Integrated Circuit Design -
2014 - 2018
Dalian University of Technology
Bachelor's degree, Integrated Circuit Design
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