Bert Van Thielen
Design Engineer at Easics- Claim this Profile
Contact Information
us****@****om
(386) 825-5501
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Location
Leuven, Flemish Region, Belgium, BE
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Experience
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easics
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Belgium
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Semiconductor Manufacturing
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1 - 100 Employee
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Design Engineer
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Jul 2008 - Present
ASIC design engineer: experience in RTL to GDSII flow, with focus on frontend design (design, simulation, synthesis, STA) ASIC design engineer: experience in RTL to GDSII flow, with focus on frontend design (design, simulation, synthesis, STA)
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imec
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Belgium
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Research Services
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700 & Above Employee
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Design Engineer
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Aug 2000 - Jun 2008
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Education
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1996 - 2000
De Nayer Instituut
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