Experience

Silvaco Inc

• United States
• Software Development
• 100 - 200 Employee

• Digital Designer and Applicatiion Engineer for Memories

  • May 2021 - Present

  Developement and Verification of RTL models for Memories as well as Customer support on subjects related to memory compilers use. Developement and Verification of RTL models for Memories as well as Customer support on subjects related to memory compilers use.


Apple
• Indonesia
• Software Development
• 1 - 100 Employee
• ASIC Design Engineer/SRAM expert

  • Jul 2020 - Mar 2021


Intel Corporation

• United States
• Semiconductor Manufacturing
• 700 & Above Employee

• Memory Compiler (SRAM) Flow Automation and Support

  • Oct 2017 - Jun 2020

  Automation of Memory Instance Generation : - Installing Memory Compilers in a generic environment (standard input and ouput) - Generating addtionnal views : - Wrapper, scripts,... - Automating view compilation for specific EDA tools - Verifying output of flow (synthesis, simulation,...) Product Support : - Memory options explanation and optimization - Debug of error in simulations - support on product specific tasks (power… Show more Automation of Memory Instance Generation : - Installing Memory Compilers in a generic environment (standard input and ouput) - Generating addtionnal views : - Wrapper, scripts,... - Automating view compilation for specific EDA tools - Verifying output of flow (synthesis, simulation,...) Product Support : - Memory options explanation and optimization - Debug of error in simulations - support on product specific tasks (power, MBIST, repair,...) Provider Evaluation : - Evaluation of memory compliers for different technologies and vendors

• Embedded Memory Designer

  • Aug 2014 - Sep 2017

  Design of embedded SRAM compilers in leading edge technologies (28nm, 14nm,...) - Memory general architecture (wl/bl segmentation, Address decoding) - Critical Path Modelling of Memory Behavior) - Timing and margin tuning - Characterization (stimuli and measure developement, result analysis) Participated in design of spsrams, 2 port register files and ROMs



MAYA TECHNOLOGIES

• Canada
• Software Development
• 1 - 100 Employee

• Design Engineer

  • Feb 2012 - Jul 2014

  ----- Contractor for Intel Mobile Communication – Memory Team - Sophia Antipolis Memory compiler developemnt & characterization: - CMOS technology (Low-power process & Architecture) - Characterization of SPSRAM compiler (28nm) - Developmentt of High-Speed SP-SRAM memory (> 1GHz)(28nm) : Handling of the model used for simulation - Development of SP-SRAM memory (20nm) : Handling of the model used for simulation and Optimization of Row decoding ----- Contractor for Intel Mobile Communication – Memory Team - Sophia Antipolis Memory compiler developemnt & characterization: - CMOS technology (Low-power process & Architecture) - Characterization of SPSRAM compiler (28nm) - Developmentt of High-Speed SP-SRAM memory (> 1GHz)(28nm) : Handling of the model used for simulation - Development of SP-SRAM memory (20nm) : Handling of the model used for simulation and Optimization of Row decoding