Experience

WaferTech

• United States
• Semiconductor Manufacturing
• 300 - 400 Employee

• Manager, Technical Quality & Reliability

  • Apr 2014 - Present

  WaferTech is the sole U.S. based TSMC Fab with a small Quality Team. This has afforded me the opportunity to act on behalf of both customer and company managing audits, quality management system improvements, and technical quality issues. My areas of responsibility include root cause problem solving and prevention, quality event management, Internal and Customer audit, Zero Defect program and Quality Training, reliability, engineering change, overall operational control plan including SPC system, and Quality Management System improvement. Customer audits all rated VDA 6.3 >90%, best in class. Led the Internal Quality Audit program to reduce in repeat findings 50% through team-driven efficiency and effectiveness audit practice, and coaching process owners. Show less

• Manager, Defect Engineering

  • May 2009 - Apr 2014

  Manage 18 member defect engineering and operations team to continuously evolve defect reduction roadmap. Sought to innovate new methods including automatic recipe creation and sub-rule defect reduction for field return improvement (versus D0). Demonstrated >20% annual defect reduction, zero field returns, and 10+ year people retention.

• Sr. Product Engineer

  • Nov 2007 - Apr 2009

  Improved 3 major customer's satisfaction through proactive yield improvement, device stability,and issue resolution for multiple products/technologies. Utilized strengths of team members fab-wide for timely implementation of solutions.

• Sr. Defect Engineer

  • Apr 2002 - Oct 2007

  Identified and reduced multiple yield limiting defect sources while controlling existing process defectivity. Created systems and training programs to improve excursion control and reduce product jeopardy while improving KLA recipe sensitivity and throughput.



AMD

• France
• Architecture and Planning
• 1 - 100 Employee

• Etch Process Engineer

  • 1997 - 2001

  Developed, qualified and implemented etch processes in microprocessor and R&D fabs. Increased throughput while improving engineering controls and insuring successful implementation of new processes. Coached manufacturing team (operators and technicians) to make these programs self sustaining. Developed, qualified and implemented etch processes in microprocessor and R&D fabs. Increased throughput while improving engineering controls and insuring successful implementation of new processes. Coached manufacturing team (operators and technicians) to make these programs self sustaining.