Experience

Semidynamics

• Spain
• Semiconductors
• 1 - 100 Employee

• Verification Engineer

  • Mar 2023 - Present



SK hynix memory solutions Eastern Europe

• Belarus
• Software Development
• 1 - 100 Employee

• Verification Engineer

  • Jan 2019 - Dec 2022



АО СБТ

• Moscow, Russian Federation

• Head of RnD department

  • Jan 2017 - Dec 2018

  * Working on an SDR system. * Reverse-engineering existing radio-relay systems of competitors to incorporate in our product. * Extensive use of Matlab/Simulink to generate HDL Verilog code. * Supervising computational-heavy module development of RTL-designers. * Complex testing of a fully functional radio-system. * Writing utilities in C# to support testing and development process. * Working on an SDR system. * Reverse-engineering existing radio-relay systems of competitors to incorporate in our product. * Extensive use of Matlab/Simulink to generate HDL Verilog code. * Supervising computational-heavy module development of RTL-designers. * Complex testing of a fully functional radio-system. * Writing utilities in C# to support testing and development process.



ЗАО "СБТ"

• Zelenograd, Russian Federation

• Senior Researcher

  • Feb 2013 - Dec 2016

  What was done: * Reworked a block turbo-decoder algorithm: BER is about the same as AHA products. * Block trubo-decoder HDL code: 150 MHz on Zynq-7000 with 150 Mbps throughput. * Tested this turbo-decoder in the LTE communication model: perfomance is 2 to 5 dB better than RS+CC. * Simulink model of IEEE 802.16 compatible modem. Model allows HDL code generation and has TDD-like testing harness. Tested in Zynq-7000. * Built a time-varying multipath channel model to test modem in different conditions. * Designed a channel estimation algorithm for low SNR conditions. Show less



НИИ Вычислительных систем и средств управления (бывшая Отраслевая лаборатория)

• Zelenograd, Russian Federation

• FPGA designer

  • Feb 2012 - Jan 2013

  Designed a digital altimeter: * Computer control interface using C# * Code for Cortex M1 soft-processor * Hardware interface between analog part, computer, processor and hardware DSP using Verilog. Designed a digital altimeter: * Computer control interface using C# * Code for Cortex M1 soft-processor * Hardware interface between analog part, computer, processor and hardware DSP using Verilog.