Aviral Mittal

Engineer at Undisclosed
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Contact Information
us****@****om
(386) 825-5501
Location
Wimbledon, England, United Kingdom, UK

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Experience

    • Financial Services
    • 700 & Above Employee
    • Engineer
      • Oct 2023 - Present

    • United States
    • Computer Hardware Manufacturing
    • 100 - 200 Employee
    • Principal Engineer
      • Apr 2022 - Sep 2023

    • United Kingdom
    • Wireless Services
    • 1 - 100 Employee
    • SoC (System on Chip) Architect, Technical Leader
      • Aug 2017 - Apr 2022

      Overall SoC Architecture Definition. SoC interconnect/Fabric Expert. Responsible for implementing best power/performance/latency interconnects on Ultra Low Power SoCs with or without using Network on Chip IPs. Responsible for the entire SoC infrastructure Architecture on ULP IoT System on Chips using ARM Cortex-M class processors M0, M0+, M3, M4. M33, M55, M7. Processor subsystems, Memories, Caches, SoC Trace n Debug, SoC Inter Processor Communication, SoC security, SoC power management. Cadence/Tensilica HiFi Processors. Audio subsystems. Show less

    • United States
    • Semiconductor Manufacturing
    • 700 & Above Employee
    • SoC Backbone/Interconnect Architect
      • Jan 2015 - Aug 2017

      SoC Backbone/Interconnect Architect at Intel Mobile communications. Responsible for SoC fabric/ Network on Chip/NoC definition/design/delivery for NB-IoT LTE modem SoCs (XMM family)

    • SoC Subsystem Architect
      • Jan 2014 - Jan 2015

    • Micoarchitect and RTL design Engineer
      • Nov 2010 - Dec 2013

    • Sr DSP Hardware/ASIC Design Engineer
      • Nov 2007 - Nov 2010

    • United Kingdom
    • Semiconductor Manufacturing
    • 1 - 100 Employee
    • Sr RTL Design Engineer.
      • Jun 2006 - Nov 2007

      Sr RTL design Engineer for MultiMedia SoCs. Sr RTL design Engineer for MultiMedia SoCs.

    • United States
    • Semiconductor Manufacturing
    • 700 & Above Employee
    • DDR-Phy/Serdes Design Engineer
      • Aug 2004 - Nov 2005

    • Netherlands
    • Semiconductor Manufacturing
    • 700 & Above Employee
    • SoC Design/Verification & DFT Engineer
      • Sep 2000 - Aug 2004

    • Switzerland
    • Semiconductor Manufacturing
    • 700 & Above Employee
    • ASIC Library Design Engineer
      • Jun 1998 - Nov 1999

    • Telecommunications
    • 300 - 400 Employee
    • Trainee
      • 1997 - 1997

Education

  • The University of Edinburgh
    MSc, System Level Integraion, Distinction
    2005 - 2006
  • Institute of Engineering and Technology
    B-Tech, Electronics Engineering
    1994 - 1998

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