Experience

Ayar Labs

• United States
• Computer Hardware Manufacturing
• 1 - 100 Employee

• VLSI Design Engineer

  • Oct 2019 - Present



Unemployed

• Projects and Courses

  • Jul 2016 - Present

  Completed coursework in C programming language, Self-taught C++, and am implementing these skills in a generic character manager for roleplaying games. Completed coursework in C programming language, Self-taught C++, and am implementing these skills in a generic character manager for roleplaying games.



University of Southern California

• United States
• Higher Education
• 700 & Above Employee

• Research Assistant (Resource Employee)

  • Jan 2016 - Jul 2016

  Wrote RTL Verilog for compiling to an FPGA. The design was then used to test an experimental asynchronous chip. Wrote RTL Verilog for compiling to an FPGA. The design was then used to test an experimental asynchronous chip.



Westinghouse Electric Company

• Nuclear Electric Power Generation
• 700 & Above Employee

• Senior Engineer

  • Dec 2008 - May 2014

  Design Engineer in In-Core Instrumentation Systems (Amplifiers), Design Engineer in Ex-Core Instrumentation Systems (Sensors, Amplifiers, Signal Processors), Technical Lead of Reactor Coolant Pump Shaft Speed Sensing System (Sensors, Transmitters, Signal Processors), Design Team contact for Electromagnetic Compatibility Testing for above projects Design Engineer in In-Core Instrumentation Systems (Amplifiers), Design Engineer in Ex-Core Instrumentation Systems (Sensors, Amplifiers, Signal Processors), Technical Lead of Reactor Coolant Pump Shaft Speed Sensing System (Sensors, Transmitters, Signal Processors), Design Team contact for Electromagnetic Compatibility Testing for above projects