Ashwini K.

ASIC Engineer at NVIDIA
  • Claim this Profile
Contact Information
us****@****om
(386) 825-5501
Location
San Francisco Bay Area

Topline Score

Topline score feature will be out soon.

Bio

Generated by
Topline AI

You need to have a working account to view this content.
You need to have a working account to view this content.

Experience

    • United States
    • Computer Hardware Manufacturing
    • 700 & Above Employee
    • ASIC Engineer
      • Nov 2021 - Present

    • United States
    • Software Development
    • 700 & Above Employee
    • Sr Engineer II
      • Nov 2020 - Nov 2021

    • Sr Engineer I
      • Jul 2017 - Nov 2020

      - Working in the front-end compiler team on key optimization features in Design Compiler, DC NXT and Fusion Compiler.- Worked on feature validation for some of the key DCNXT and FC features. - Collaborated with various cross-functional teams, across platforms to meet project deliverables- Providing technical support to field engineers and debugging issues in the tool.

    • United States
    • Software Development
    • 700 & Above Employee
    • R&D Intern
      • Jun 2016 - Dec 2016

      - Worked as an R&D intern in Synopsys Design Group, on feature enhancements in DC (Design Compiler) - Resolved customer-critical bugs and issues while collaborating with the CAEs and ACs to implement and validate new features or enhancements in DC - Developed a report generation and categorization utility using TCL and Perl for easier migration between DC to FC - Worked as an R&D intern in Synopsys Design Group, on feature enhancements in DC (Design Compiler) - Resolved customer-critical bugs and issues while collaborating with the CAEs and ACs to implement and validate new features or enhancements in DC - Developed a report generation and categorization utility using TCL and Perl for easier migration between DC to FC

    • United States
    • Software Development
    • 700 & Above Employee
    • Graduate Engineer Trainee
      • Oct 2014 - Jul 2015

      - Automated feature verification of Synplify and Protocompiler suite of tools using TCL and Squish - Validated new features in Synplify and Protocompiler for subsequent releases - Validated GUI features for Microsemi OEM - Worked on HDL analyst feature validation - Acquired in-depth understanding of FPGA synthesis and FPGA prototyping technologies - Automated feature verification of Synplify and Protocompiler suite of tools using TCL and Squish - Validated new features in Synplify and Protocompiler for subsequent releases - Validated GUI features for Microsemi OEM - Worked on HDL analyst feature validation - Acquired in-depth understanding of FPGA synthesis and FPGA prototyping technologies

Education

  • Arizona State University
    Master’s Degree, Electrical Engineering

Community

You need to have a working account to view this content. Click here to join now