Ashwini K.
ASIC Engineer at NVIDIA- Claim this Profile
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Bio
Experience
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NVIDIA
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United States
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Computer Hardware Manufacturing
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700 & Above Employee
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ASIC Engineer
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Nov 2021 - Present
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Synopsys Inc
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United States
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Software Development
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700 & Above Employee
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Sr Engineer II
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Nov 2020 - Nov 2021
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Sr Engineer I
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Jul 2017 - Nov 2020
- Working in the front-end compiler team on key optimization features in Design Compiler, DC NXT and Fusion Compiler.- Worked on feature validation for some of the key DCNXT and FC features. - Collaborated with various cross-functional teams, across platforms to meet project deliverables- Providing technical support to field engineers and debugging issues in the tool.
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Synopsys Inc
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United States
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Software Development
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700 & Above Employee
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R&D Intern
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Jun 2016 - Dec 2016
- Worked as an R&D intern in Synopsys Design Group, on feature enhancements in DC (Design Compiler) - Resolved customer-critical bugs and issues while collaborating with the CAEs and ACs to implement and validate new features or enhancements in DC - Developed a report generation and categorization utility using TCL and Perl for easier migration between DC to FC - Worked as an R&D intern in Synopsys Design Group, on feature enhancements in DC (Design Compiler) - Resolved customer-critical bugs and issues while collaborating with the CAEs and ACs to implement and validate new features or enhancements in DC - Developed a report generation and categorization utility using TCL and Perl for easier migration between DC to FC
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Synopsys Inc
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United States
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Software Development
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700 & Above Employee
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Graduate Engineer Trainee
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Oct 2014 - Jul 2015
- Automated feature verification of Synplify and Protocompiler suite of tools using TCL and Squish - Validated new features in Synplify and Protocompiler for subsequent releases - Validated GUI features for Microsemi OEM - Worked on HDL analyst feature validation - Acquired in-depth understanding of FPGA synthesis and FPGA prototyping technologies - Automated feature verification of Synplify and Protocompiler suite of tools using TCL and Squish - Validated new features in Synplify and Protocompiler for subsequent releases - Validated GUI features for Microsemi OEM - Worked on HDL analyst feature validation - Acquired in-depth understanding of FPGA synthesis and FPGA prototyping technologies
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Education
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Arizona State University
Master’s Degree, Electrical Engineering