Experience

Zendar

• United States
• Software Development
• 1 - 100 Employee

• VP of Engineering

  • May 2022 - Present

  Berkeley, California, United States I manage all of Zendar's software engineering. My responsibilities and accomplishments have included: - Integrating our new Germany and Paris teams (15 engineers) into our team and projects - Developing 4 new engineering managers and staff+ engineers - Hiring and scaling our SW org for 2x growth (and counting) and adding adjacent functions such as devops and quality - Presenting our technology to investors and customers - Managing our patent portfolio - Spearheading and… Show more I manage all of Zendar's software engineering. My responsibilities and accomplishments have included: - Integrating our new Germany and Paris teams (15 engineers) into our team and projects - Developing 4 new engineering managers and staff+ engineers - Hiring and scaling our SW org for 2x growth (and counting) and adding adjacent functions such as devops and quality - Presenting our technology to investors and customers - Managing our patent portfolio - Spearheading and overseeing a large migration of our software to rewrite and replace outdated systems that were designed for very different uses

• Director of Systems Engineering

  • Aug 2020 - May 2022

  Berkeley, CA In addition to the hardware team, I was also responsible for managing 4 signal processing engineers. My teams had two major accomplishments in this time: - We dramatically improved the software functionality of the evaluation kit (EVK) by shipping our SAR and point cloud pipelines as real-time 360 degree sensing capabilities. My team and I spent countless hours in the car collecting data, developing features, debugging, and optimizing code. - We launched our 2nd gen EVK hardware, which… Show more In addition to the hardware team, I was also responsible for managing 4 signal processing engineers. My teams had two major accomplishments in this time: - We dramatically improved the software functionality of the evaluation kit (EVK) by shipping our SAR and point cloud pipelines as real-time 360 degree sensing capabilities. My team and I spent countless hours in the car collecting data, developing features, debugging, and optimizing code. - We launched our 2nd gen EVK hardware, which was 1/2x the cost, 1/4x the size, and much more reliable compared to the 1st gen. We shipped ~15 of this EVK generation to customers and completed multiple POCs with ag customers which translated into longer-term development. In this time I developed new tech leads across my teams that were able to drive these projects with significant autonomy.

• System Engineer / Hardware Team Lead

  • Jan 2019 - Aug 2020

  Berkeley, CA I hired and led a team of 3 full-time employees and 2 contractors spanning EE, ME, FPGA, and FW. In this time, we had two major achievements: - We migrated all of our radar hardware from USB to FPD Link III, massively improving the sensor reliability and datarate. This was one of the first satellite radars in the industry, even though we didn't know it at the time. - We designed Zendar's first evaluation kit (EVK), which included the radar sensors connected via FPD Link to an Nvidia… Show more I hired and led a team of 3 full-time employees and 2 contractors spanning EE, ME, FPGA, and FW. In this time, we had two major achievements: - We migrated all of our radar hardware from USB to FPD Link III, massively improving the sensor reliability and datarate. This was one of the first satellite radars in the industry, even though we didn't know it at the time. - We designed Zendar's first evaluation kit (EVK), which included the radar sensors connected via FPD Link to an Nvidia Jetson Xavier. We delivered the first gen EVK to three customers (our first revenue) and it was critical in helping us raise our Series B. In my IC role I developed the hardware and signal processing for our front-facing SAR technology and ultimately helped us pivot away from this as we realized it had too many drawbacks.

• System Engineer

  • Feb 2018 - Jan 2019

  Berkeley, CA I joined as the 6th employee and the first with EE and RF background. Zendar had just raised a seed round so our goal was to prove out the initial SAR technology idea that the company was founded on. I contributed by building 2 different radar prototypes and by understanding how the RF, HW, and synchronization specs of those sensors influenced the signal processing design and the overall system performance.



University of California, Berkeley

• United States
• Higher Education
• 700 & Above Employee

• Graduate Student Researcher

  • Sep 2013 - Dec 2017

  Berkeley, CA My PhD thesis developed the world's first massive MIMO prototype at 72GHz: 128-element phased array forming 16 beams simultaneously. • System design including architecture, specifications, and interfaces. • Full hardware prototype implementation: antenna to FPGA. • Algorithm/software: Develop baseband processing chain in Matlab/Python/FPGA. • 2 IC tapeouts (65nm CMOS): Taped out radio RX. Chip lead + digital designer on mixed-signal test chip. Other: • Extensive… Show more My PhD thesis developed the world's first massive MIMO prototype at 72GHz: 128-element phased array forming 16 beams simultaneously. • System design including architecture, specifications, and interfaces. • Full hardware prototype implementation: antenna to FPGA. • Algorithm/software: Develop baseband processing chain in Matlab/Python/FPGA. • 2 IC tapeouts (65nm CMOS): Taped out radio RX. Chip lead + digital designer on mixed-signal test chip. Other: • Extensive experience working with and leading teams of 4-8 grad students • Wrote NSF grant bringing in >$1M to support mm-wave array research initiative • Organized seminar series on future wireless systems directions Show less



NVIDIA

• United States
• Computer Hardware Manufacturing
• 700 & Above Employee

• Research Intern

  • May 2016 - Sep 2016

  Santa Clara, CA, USA Research on hardware accelerator design using high-level synthesis tools. I implemented an architectural spec of an ML accelerator in HLS tools and contributed to development of an HLS methodology for ASIC design.



Intel Corporation

• United States
• Semiconductor Manufacturing
• 700 & Above Employee

• Signaling Research Intern

  • May 2015 - Aug 2015

  Hillsboro, OR Design of mm-wave wireless links. I developed models for mm-wave links to predict and compare performance of circuit and system design choices.



Qualcomm

• United States
• Telecommunications
• 700 & Above Employee

• RF Hardware Engineer Intern

  • Jun 2013 - Aug 2013

  San Diego, CA System design of RF front end · Link budget analysis of RF transceiver: sensitivity, Tx max power, ACPR, Rx- and GPS-band noise · Frequency planning for carrier aggregation coexistence · Front end component selection and matching network design



McDermott Group

• Undergraduate Research Assistant

  • Sep 2009 - May 2013

  Madison, Wisconsin Area Research on 1/f magnetic flux noise in superconducting quantum devices · Cleanroom fabrication of superconducting quantum interference devices (SQUIDs) and Josephson phase qubits · Numerical modeling and simulations · Experimentation, data collection/processing



Qualcomm

• United States
• Telecommunications
• 700 & Above Employee

• RF Hardware Engineer Intern

  • May 2012 - Aug 2012

  San Diego, CA Test and debugging of RF modules using Qualcomm chipsets · Design+test GPS front-end filter design for LTE B13 coexistence. · Measure and debug EMI and impact on RX sensitivity. · Evaluated new near-field scanning tool for EMI debugging; presented results and recommendations to management regarding the product's usefulness. · Extensive use of test equipment such as network analyzer, spectrum analyzer, signal generator, call box, etc.



NI (National Instruments)

• United States
• Electrical Equipment Manufacturing
• 700 & Above Employee

• Hardware Engineering Intern

  • May 2011 - Aug 2011

  Austin, TX PCB schematic, layout, and test · Completely developed analog output adapter module for FlexRIO product line. · Defined product features, selected components, and simulated performance · Schematic capture and complete layout of PCB · Devised and executed a verification and validation plan to verify and optimize the performance