Andrew Watkins
Principal Software Engineer at Mindspeed Technologies- Claim this Profile
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Bio
Experience
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Picochip Limited
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United Kingdom
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Semiconductor Manufacturing
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1 - 100 Employee
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Principal Software Engineer
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feb. de 2012 - - actualidad
Development of BSPs (kernel and drivers) for range of LTE and WCDMA evaluation boards and reference designs.* Drivers for a Cavium Octeon I / II based system* Drivers and kernel for embedded ARM based systems.* Development of a MUSCLE API for smart cards.* Familiar with DMA driver development* Experience of kenrel and driver debug including JTAG* Experience of real time Linux and multicore code development and debug* Introduced Flint to driver development and familiar with the concept writing clean code, performing continuous improvement and the use of automated regression testing.
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Principal Software Engineer
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feb. de 2008 - feb. de 2012
Development of BSPs (kernel and drivers) for range of LTE and WCDMA evaluation boards and reference designs.* Drivers for a Cavium Octeon I / II based system* Drivers and kernel for embedded ARM based systems.* Development of a MUSCLE API for smart cards.* Familiar with DMA driver development * Experience of kenrel and driver debug including JTAG* Experience of real time Linux and multicore code development and debug* Introduced Flint to driver development and familiar with the concept writing clean code, performing continuous improvement and the use of automated regression testing.
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Principal Applications Engineer
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may. de 2005 - feb. de 2008
* Been the main Applications contact with a partner in collaboration to produce an 802.16e WiMax Base Station reference design. This activity involves integrating two major software functions (MAC and PHY) on a board containing an RF module.* Helped customers develop Base Stations using the reference designs. Most problems occur in software integration, testing or customisation, or are in the board interfaces; interrupts, DMA, or RF.* Provided front line support and delivered customer tools and PHY training.* Written application notes and performed bench marking. * Written a PHY demo application that performs an Ethernet bridge between 2 or more computers via an RF link, and can be used for customer demos and trade shows.* Attended Plugfest (a thrice a year activity organised by the WiMax Forum) in which Base and Mobile Station vendors are put through formal interoperation testing.
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Zarlink Semiconductor is now Microsemi
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United States
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Semiconductor Manufacturing
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1 - 100 Employee
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Embedded Software Engineer
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dic. de 2003 - abr. de 2005
Digital Television Business Unit.Worked on the ZL1036xx Single and Dual Channel Digital Television Processor chip.This is an Integrated Digital Television chip, receiving base band input, and producing TV out using an internal MIPS processor. My roles were:*To develop code to evaluate the chip and its sub systems including boot ROM, UARTs, smart card interfaces, serial and flash memories.*To write Linux drivers for the chip using Ethernet download, and TRACE32.* To perform chip emulation using Celaro connected to the board via an adapter card.* To maintain the tool chain and environment for running test cases on the board and for simulation.* To write and maintain the boot code for the MIPS processor.
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Hardware / Software Engineer
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1999 - dic. de 2003
Media Business Unit:Worked ion the VP310 / MT312 Satellite decoder and COFDN demodulation chips.These are satellite demodulation chips. The development environment consisted of GCC, an embedded ARM 610, and ICE interface. My role was to develop and test a set of API device drivers for these chips.Network Business Unit:Worked on the ZL5011x TDM to IP processor for CESoIP chip.This chip performs Circuit Emulation Services over IP, to seamlessly route TDM over an Ethernet. The environment was Tornado / VxWorks, and Embedded Planet MPC8260 / MPC860 cards. My roles were:* To help perform the system evaluation.* To write code to test that all the TDM paths through the chip function correctly.* To write the DMA interface using complex multi-thread, real-time code for PowerPC. * To perform hardware / software co-verification with DDD and VERA to interface to the hardware.MT90880 TDM to IP processor for backplanes and networks apps chip.The device dynamically performs the aggregation of TDM streams and channels into a packet based network. The evaluation system was Tornado / VxWorks and a Windriver MPC8260 card. * I specified and developed the full device API.* I wrote the device driver to support the DMA master transferring data across the PCI bridge.* I helped to conduct the device and API evaluation.
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Hardware / Software Develoment engineer
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ago. de 1985 - 1999
ASIC development Engineer, ASICs business unit.* Gate array cell library design. validation, and characterisation including parametrised RAM and ROM.* Development of EDA software for cell library development (VMS)* Development of a graphical work station package for the design of gate and embedded arrays (C for Sun and VMS)* Development of software for adding metal and polysilicon pattern fill chips prior to manufacture. ASIC development Engineer, ASICs business unit.* Gate array cell library design. validation, and characterisation including parametrised RAM and ROM.* Development of EDA software for cell library development (VMS)* Development of a graphical work station package for the design of gate and embedded arrays (C for Sun and VMS)* Development of software for adding metal and polysilicon pattern fill chips prior to manufacture.
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Education
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Aston University
BSC, Electrical and Electronics Engineering -
Worcester Royal Grammar School