An Hsun Liao

Senior Product Manager at Innostor Technology Corporation
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Contact Information
us****@****om
(386) 825-5501
Location
Hsinchu City, Taiwan, Taiwan, TW

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Credentials

  • TS 16949:2009 internal auditor
    SGS
    Nov, 2015
    - Oct, 2024
  • PMP
    Certified by Project Management Institute (PMI)
    Dec, 2010
    - Oct, 2024

Experience

    • Computers and Electronics Manufacturing
    • 1 - 100 Employee
    • Senior Product Manager
      • Feb 2011 - Present

      1. Accomplish the production targets in Delivery Schedule, High Yield Performance, and High Quality.2. Handle new production introduction from Wafer tape out, Package to Testing Engineering.3. Optimize the production flow at Wafer, Package and Testing process.4. Execute FA and provide the solution for RMA, MRB, Low yield, and IC debugging.5. Survey and qualify new subcontractors such as Wafer, Package and Testing houses.6. Collaborate with IC designer to prevent the production issue in the design stage.7. Contribution:  Resolve the IC shortage problems at hot season by timely expanding the Package and Testing throughput. Resolve 0.11um Iddq issue and increase yield from 80% to 95% within 6 months. Perform the DOE of Wafer, Package, and Testing process to create BKM solution. Improve the quality to meet customer ppm target. Conduct the external auditor on subcontractors.

    • Taiwan
    • Semiconductor Manufacturing
    • 1 - 100 Employee
    • Product Manager
      • Dec 2005 - Jun 2010

      1. Recommend the suitable fab process and best solution of package to IC designer. 2. Perform statistical analysis and improve 0.13 products to meet 95% yield target. 3. Contribute FA solutions to assist designer in debugging tasks. 1. Recommend the suitable fab process and best solution of package to IC designer. 2. Perform statistical analysis and improve 0.13 products to meet 95% yield target. 3. Contribute FA solutions to assist designer in debugging tasks.

    • Taiwan
    • Semiconductor Manufacturing
    • 300 - 400 Employee
    • Product Engineer
      • Sep 2002 - Dec 2005

      1. Improved 20% yield for 0.25, 0.18um products by optimizing testing and foundry recipes.2. Provide FA methods for 0.13um IC failure of ESD, product reliability, low yield, and RMA.3. Use EFA tools such as E-beam and tester to clarify SRAM stack on fault issue. 1. Improved 20% yield for 0.25, 0.18um products by optimizing testing and foundry recipes.2. Provide FA methods for 0.13um IC failure of ESD, product reliability, low yield, and RMA.3. Use EFA tools such as E-beam and tester to clarify SRAM stack on fault issue.

    • Taiwan
    • Semiconductors
    • 700 & Above Employee
    • Technology Development Engineer
      • Nov 2000 - Sep 2002

      1. Use HP4156 to measure the device performance to succeed in the thin Gate Oxide development of 0.13um logic process.2. Succeed in device qualification of 0.13um logic process. 1. Use HP4156 to measure the device performance to succeed in the thin Gate Oxide development of 0.13um logic process.2. Succeed in device qualification of 0.13um logic process.

    • Taiwan
    • Semiconductor Manufacturing
    • 700 & Above Employee
    • Process Integration Engineer
      • Jul 1999 - Nov 2000

      1. Implement 90% shrinkage process flow of 0.5um, and succeed in product qualification and new products introduction2. Attain 0.5um process line yield and well monitor key WAT SPC to meet target.3. Use PFA solutions such as TEM to identify the root cause of Contact to Poly Gate short. 1. Implement 90% shrinkage process flow of 0.5um, and succeed in product qualification and new products introduction2. Attain 0.5um process line yield and well monitor key WAT SPC to meet target.3. Use PFA solutions such as TEM to identify the root cause of Contact to Poly Gate short.

Education

  • National Taiwan University
    Master's Degree, Material Science and Engineering
    1995 - 1997

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