Experience

Decision Sciences

• United States
• Security and Investigations
• 1 - 100 Employee

• Sr. Systems Integration & Test Engineer

  • Apr 2017 - Present

  United States



Broadcom

• United States
• Semiconductor Manufacturing
• 700 & Above Employee

• Principal Engineer, Design Verification and Test

  • 2015 - 2016

  Greater San Diego Area Manage asset allocation and ensure compliance with strict security measures and strict documentation requirements on testing process and methodologies. Mentored and provided technical guidance to more junior team members. Participated in board schematic review for testing platform. ● Directed the U.S.’s first EAL5+ Common Criteria security certification of development facility. ● Delivered DVT characterization across PVT for mass production on Common Criteria-certified ASIC SOC. ●… Show more Manage asset allocation and ensure compliance with strict security measures and strict documentation requirements on testing process and methodologies. Mentored and provided technical guidance to more junior team members. Participated in board schematic review for testing platform. ● Directed the U.S.’s first EAL5+ Common Criteria security certification of development facility. ● Delivered DVT characterization across PVT for mass production on Common Criteria-certified ASIC SOC. ● Improved testing times from 3 months to 1 week by developing automation test requirements. ● Led a team of engineers in automation development; served as a Main Contributor and Architect for code development. ● Defined sound coding principles for automation including proper coding guidelines, standards function/logging/module formats, proper error handling, and write for re-use. ● Created Excel-based, table-driven automation methodology; configured sections controlled with Visual Basic macro buttons.

• Manager, Design Verification and Test

  • 2010 - 2015

  Greater San Diego Area Managed a team of 8 engineers and 3 lab support engineers with a $1M budget; lab support including rework, board allocation, test equipment ordering, and allocation across multiple groups (FW, front-end, back-end, SVT, DVT, systems, and apps). Managed DVT efforts for Combo, Bluetooth, NFC, and Common Criteria-certified products. Presented the management team and customers regarding test schedules, test results, test coverage, technical obstacles, and issue resolution. Directed DVT support for… Show more Managed a team of 8 engineers and 3 lab support engineers with a $1M budget; lab support including rework, board allocation, test equipment ordering, and allocation across multiple groups (FW, front-end, back-end, SVT, DVT, systems, and apps). Managed DVT efforts for Combo, Bluetooth, NFC, and Common Criteria-certified products. Presented the management team and customers regarding test schedules, test results, test coverage, technical obstacles, and issue resolution. Directed DVT support for field returns across all projects and provided status at weekly QA meetings. ● Collaborated with hardware and firmware design teams to define testing requirements based on technical and functional specifications; adhered to established development processes including design and code reviews. ● Improved lab efficiency by 50% by writing a Visual Basic script; handled incoming lab requests; and created and linked SharePoint tasks to individual Outlook accounts. ● Led the automation team’s focus on critical components (problem areas, easily testable, and requiring minimal maintenance efforts); Delivered optimal return on investment. ● Delivered reliable and accurate automation by championing product testability, identifying workable requirements, planning tests carefully, rationalizing the testing concept, and presenting a good adaptable automation framework. ● Developed and executed endurance and retention test suite for embedded flash characterization for manufacturing yield and field DPPM improvements. ● Served as technical lead for LDO regulator bench characterization including dropout voltage, quiescent current, standby current, line regulation, load regulation, and transient response. ● Created standalone script for open loop, closed loop, and long-term jitter characterization of DCO.



Broadcom

• United States
• Semiconductor Manufacturing
• 700 & Above Employee

• Senior Staff Engineer, Design Verification and Test

  • 2003 - 2009

  Greater San Diego Area Developed automated regression test strategy, test plan, test design, and test benches. Led DVT for various ARM-based Bluetooth and WLAN combo projects providing status, test schedules, comprehensive incident report, and incident root analysis. Worked with design and system teams to review test plans and recommend testing strategies for features and components. ● Developed object-oriented automation platform in Perl; platform became the main testing platform for ASIC qualifications… Show more Developed automated regression test strategy, test plan, test design, and test benches. Led DVT for various ARM-based Bluetooth and WLAN combo projects providing status, test schedules, comprehensive incident report, and incident root analysis. Worked with design and system teams to review test plans and recommend testing strategies for features and components. ● Developed object-oriented automation platform in Perl; platform became the main testing platform for ASIC qualifications across multiple teams. ● Automated DVT regression testing for production qualification. ● Automated Bluetooth Low Energy hardware testing for Bluetooth self-certification. ● Developed standalone Perl scripts for automating test results including power measurements, low energy mode, Bluetooth ACL, and SCO data transfers, Bluetooth connection, and RF stress tests. ● Developed Visual Basic scripts to run on LeCroy Oscope; processed LE packet data. ● Created maintenance schematic for scripts; cron job handling daily server updates and version control in GIT. ● Designed code update script for lab machines; allowed engineers to pick up latest file revisions without overwriting development efforts or local changes. Show less



Ericsson

• Sweden
• Telecommunications
• 700 & Above Employee

• Senior Hardware Engineer

  • 1999 - 2003

  Greater San Diego Area Developed FPGA VHDL for system timing board with a glitch-filtering state machine, control/status registers, address decoder, 20ms interrupt generator, and GPS interface. ● Created UNIX shell scripts for automated simulation and synthesis. ● Resolved hardware tool issues. Evaluated a suite of FPGA tools and eliminated unjustifiable features resulting in $70K in annual savings in licensing fee. ● Eliminated the need to perform specific DS1 FCC Part 68 certification testing… Show more Developed FPGA VHDL for system timing board with a glitch-filtering state machine, control/status registers, address decoder, 20ms interrupt generator, and GPS interface. ● Created UNIX shell scripts for automated simulation and synthesis. ● Resolved hardware tool issues. Evaluated a suite of FPGA tools and eliminated unjustifiable features resulting in $70K in annual savings in licensing fee. ● Eliminated the need to perform specific DS1 FCC Part 68 certification testing out-of-house. Generated test plan and test report according to FCC Part 68 requirements for self-certification with reduced costs by $10K per testing session. ● Integrated DS1 backhaul interface cards in next generation BSC; completed effort to clean up one of the most plagued segments of system (backhaul, DS1 connections between BSC and RBS); identified 83 system-level trouble tickets. ● Oversaw DS1 system interface; facilitated relations with third party vendors including Larscom, Verilink, and Paragon. ● Debugged system-wide ATM cell loss issue. Discovered Framer/LIU ASIC was saturating line interface transformers. ASIC designers recognized the bug and revised part. Show less



Qualcomm

• United States
• Telecommunications
• 700 & Above Employee

• System Test Engineer

  • 1996 - 1999

  Greater San Diego Area Served as a Technical Lead for functional verification of all DS1 interfaces to BSC and integrated 3rd party DS1 equipment. Defined testing requirements and generated reports. ● Managed end-of-life issues from 3rd party vendors and assisted the forecasting team with last-time buy quantities. ● Prevented supply issue and million dollar contract revenue by directing third party software emergency releases. ● Conducted DS1 technology and backhaul operation training; improved the… Show more Served as a Technical Lead for functional verification of all DS1 interfaces to BSC and integrated 3rd party DS1 equipment. Defined testing requirements and generated reports. ● Managed end-of-life issues from 3rd party vendors and assisted the forecasting team with last-time buy quantities. ● Prevented supply issue and million dollar contract revenue by directing third party software emergency releases. ● Conducted DS1 technology and backhaul operation training; improved the systems verification team handling of backhaul issues and facilitated technology transfer to Brazil. ● Successfully identified a defective PBA in a live system using log files; PBA replacement in DS1 MUX subsystem restored inter-BSC handoff operation. ● Developed embedded test software in C to prove FPGA algorithm; verified router’s ability to arbitrate among multiple PBAs. ● Co-developed a PC board emulating a DISCO router port; modified VHDL code for added functionality; PC board assisted 3rd party vendors in qualifying DS1 equipment without having to ship expensive router. ● Automated IS-99 Data Services testing for CDMA phones with ProComm scripts. Show less