Alessandro Danese
Software Engineer at Meteomatics- Claim this Profile
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Italiano Native or bilingual proficiency
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Inglese Full professional proficiency
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Tedesco Limited working proficiency
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Bio
Experience
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Meteomatics AG
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Switzerland
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Information Services
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1 - 100 Employee
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Software Engineer
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Oct 2019 - Present
Role: development and optimization of algorithms and software architectures for forecasting and processing of large amount of weather data. • Increased server query response time up to 30% by designing and co-leading the implementation of a new approach to compute weather parameters (C++). • Increased server query response time by 20% by optimizing computationally intensive algorithms (C++). • Made server API front-ends reliable and easy to extend by designing, implementing, and verifying a new parsing logic for incoming API requests (C++). • Designed and leaded the development of a software architecture capable of efficiently receiving, storing, and managing millions of weather alerts/observations from airports and weather stations worldwide (Python, C++, geographic databases). • Reviewed code developed by other developers and provided feedback to ensure best practices (C++). Role: mentoring CPP-teams on good practices for software design, development, and testing. • Organized and gave tech talks about SOLID principles, design patterns, unit-tests, and test-coverage. Role: scrum-master in a team of 7 people. • Conducting daily meetings to monitor the progress of the ongoing tasks, address raising issues, and ensuring timely completion within the expected deadlines. Role: technical support for customers and sales. Show less
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University of Verona
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Italy
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Higher Education
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700 & Above Employee
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Postdoctoral Researcher
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Jan 2018 - Oct 2019
Research Project: Application of semi-formal approaches for the resolution of firmware security vulnerabilities. • Defined a methodology to automatically remove an identified vulnerability from a firmware source code without modifying other functionalities. Research Project: Application of semi-formal approaches for the resolution of firmware security vulnerabilities. • Defined a methodology to automatically remove an identified vulnerability from a firmware source code without modifying other functionalities.
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Università degli Studi di Verona
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Italy
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Higher Education
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700 & Above Employee
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Contract Professor - Operating Systems
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Jan 2018 - Sep 2019
Main lecturer for the course: “Operating Systems (Laboratory)”, BSc degree in Computer Science (6 ECTS) Designed and implemented an educational open-source Linux-like Operating System (C, Assembly). Public repository: https://mentos-team.github.io/ Gave lectures about C programming language, system calls, and memory/task management in Linux. Main lecturer for the course: “Operating Systems (Laboratory)”, BSc degree in Computer Science (6 ECTS) Designed and implemented an educational open-source Linux-like Operating System (C, Assembly). Public repository: https://mentos-team.github.io/ Gave lectures about C programming language, system calls, and memory/task management in Linux.
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Politecnico di Milano
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Italy
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Research Services
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700 & Above Employee
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Teaching Assistant - Computer Science
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Sep 2018 - Dec 2018
Main lecturer for the course: “Computer Science (Laboratory)”, BSc degree in Mechanical Engineering (6 ECTS) Gave lectures on design and synthesis of digital circuits, C programming language, and MATLAB (C). Main lecturer for the course: “Computer Science (Laboratory)”, BSc degree in Mechanical Engineering (6 ECTS) Gave lectures on design and synthesis of digital circuits, C programming language, and MATLAB (C).
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Intel Corporation
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United States
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Semiconductor Manufacturing
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700 & Above Employee
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Researcher
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Jul 2017 - Dec 2017
Research division: INTEL Strategic CAD LABs Decreased the emulation time up to 20% of industrial-size hardware components for FPGA platforms by implementing a new approach automatically removing the unnecessary hardware components for a functionality under test (System Verilog). Research division: INTEL Strategic CAD LABs Decreased the emulation time up to 20% of industrial-size hardware components for FPGA platforms by implementing a new approach automatically removing the unnecessary hardware components for a functionality under test (System Verilog).
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University of Michigan
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United States
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Higher Education
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700 & Above Employee
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Visiting PHD Student
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Jul 2016 - Dec 2016
Research Project: Application of semi-formal approaches for the identification of firmware security vulnerabilities (Mentor: Valeria Bertacco). • Defined a new methodology to automatically identify the execution paths of a firmware that most likely can be exploited by attackers to introduce a security vulnerability in an SoC. (Project supported by C-FAR, one of the six research centers sponsored by MARCO and DARPA). The defined strategy was selected and presented in an internal tech talk at INTEL Strategy CAD LABs. Show less
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Education
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Università degli Studi di Verona
Doctor of Philosophy - PhD, Informatica -
Università degli Studi di Verona
Laurea Magistrale LM in scienze e tecnologie informatiche, Embedded Systems -
Università degli Studi di Verona
Laurea L in Scienze e Tecnologie Informatiche -
ITIS - Guglielmo Marconi
Diploma perito informatico