Experience

INVENTVM Semiconductor

• Italy
• Semiconductor Manufacturing
• 1 - 100 Employee

• Senior Digital IC Design Engineer

  • Mar 2021 - Present



Silicon Mitus

• South Korea
• Semiconductors
• 1 - 100 Employee

• Senior Digital IC Design Engineer

  • May 2019 - Feb 2021

• Digital IC Design Engineer

  • Jul 2017 - Apr 2019



Texas Instruments

• United States
• Semiconductor Manufacturing
• 700 & Above Employee

• Digital IC Design Engineer

  • Jul 2016 - Jun 2017



Marvell Semiconductor

• 1 - 100 Employee

• Digital IC Design Engineer

  • May 2014 - Jul 2016

  I'm a part of the PMIC design team: as a digital design engineer, I partecipate in block specifications definition, RTL coding, logical verification, synthesis and gate level verification. After circuit tapeout, I'm involved in lab verification and support to ATE engineers. I'm a part of the PMIC design team: as a digital design engineer, I partecipate in block specifications definition, RTL coding, logical verification, synthesis and gate level verification. After circuit tapeout, I'm involved in lab verification and support to ATE engineers.

• Intern

  • Jul 2013 - Nov 2013

  The main objective of the internship was the study of an alternative architecture for a low-power high-resolution TDC.I was involved in the realization of the proposed architecture, taking care of the matching with the specifications required, first at behavioral level, then at transistor level. The main objective of the internship was the study of an alternative architecture for a low-power high-resolution TDC.I was involved in the realization of the proposed architecture, taking care of the matching with the specifications required, first at behavioral level, then at transistor level.