Experience

SilTerra Malaysia Sdn. Bhd.

• Malaysia
• Semiconductors
• 400 - 500 Employee

• Senior Engineer

  • Oct 2015 - Present

  • Responsible to lead the simulation of process and device for BCD, HV, PowerMos, Silicon Photonics, IoT, Nanowire and PZR Technology. • Handling the process or device issue throughout the simulation to figureout the root cause and support the retarget of electrical performances. • Design, execute and analyze experiments for troubleshooting various process issues. • Lead the simulation team in resolving the device performances issue such as HCI issue throughout the simulation and propose the best simulated condition to development team. • Analyze inline process data (CD, thickness/E-Test/FA/ SEM/TEM and etc.) to correlate to process and devices performances in TCAD simulation. • Coordinate with available resources for process engineering, product engineering, Failure Analysis team and manufacturing group in trouble shooting, resolving issues, process improvement and yield enhancement. • Lead the simulation for mask reduction in term of cost saving meanwhile sustaining the electrical performances. • Develop the test structure for SIMS profiles extraction and use for TCAD calibrations. Involving the process and device calibrations. • Experienced in handling the simulation for PowerMos and Superjunction technology using 3D profile in TCAD simulation. • Responsible in resolving the process or device issues and process improvement throughout the analysis of TCAD simulation. • Interact with customer for process integration improvement and devices performances based on customer’s need and requirement. • Technology support for new development of BCD DMOS technology involving 40V to 60V devices to meet the electrical performances (ex: Vt, Rdson & Bvdss). Show less



SilTerra Malaysia Sdn. Bhd.

• Malaysia
• Semiconductors
• 400 - 500 Employee

• Intern

  • Jun 2014 - Sep 2014

  • Assist engineer in performing testing on final package chip for reliability purpose. • Assist engineer in performing the stress measurement. • Assist engineer in performing testing on final package chip for reliability purpose. • Assist engineer in performing the stress measurement.