Experience

RED Digital Cinema

• United States
• Media Production
• 100 - 200 Employee

• Senior FPGA/ASIC Design Engineer

  • Dec 2021 - Present

  Ottawa, Ontario, Canada



Ross Video

• Canada
• Broadcast Media Production and Distribution
• 700 & Above Employee

• Architect, Hyperconverged IP HW Solutions

  • Sep 2021 - Dec 2021

  Ottawa, Ontario, Canada

• Senior FPGA Developer, Technical Lead

  • Sep 2016 - Sep 2021

  Ottawa, Canada Area Note: Coveloz was acquired by ROSS VIDEO in September 2016



COVELOZ Technologies Inc.

• Canada
• Broadcast Media Production and Distribution
• 1 - 100 Employee

• FPGA Designer

  • Apr 2013 - Sep 2016

  Ottawa, Canada Area Worked on the integration and verification of a multi-rate 100G OTN Muxponder FPGA capable of transporting 10GbE, OTU1/e/f, OTU2/e/f, FC4, FC8, FC10, FC16, Infiniband (QDR, DDR and SDR) and 40GbE client signals.



Datacom

• Brazil
• Telecommunications
• 300 - 400 Employee

• FPGA Design Engineer

  • Feb 2008 - May 2012

  Porto Alegre Area, Brazil Designed and verified hardware and programmable logic with tight area and timing constraints for high bandwidth transport network equipments such as SDH/SONET multiplexers and Ethernet/PDH/SDH interface cards targeting Xilinx FPGAs and Altera CPLDs. • Architecture definition, coding, simulation, synthesis, place & route, timing analysis, verification and documentation of hardware description (VHDL RTL). • Static Timing Analysis and design optimization. • Created, improved and… Show more Designed and verified hardware and programmable logic with tight area and timing constraints for high bandwidth transport network equipments such as SDH/SONET multiplexers and Ethernet/PDH/SDH interface cards targeting Xilinx FPGAs and Altera CPLDs. • Architecture definition, coding, simulation, synthesis, place & route, timing analysis, verification and documentation of hardware description (VHDL RTL). • Static Timing Analysis and design optimization. • Created, improved and maintained Microblaze and PowerPC soft-core processors architectures. • Designed and improved test bench modules using VHDL. • Designed, improved and maintained the in-system verification environment code base using LUA. • On-Chip Debugging (Chipscope) • Managed two major projects: Gigabit and Fast Ethernet interface cards in two different platforms. • Collaborated with hardware, software, purchasing, manufacturing, fabric testing, mechanical, EMC and regulatory teams in order to insure optimal performance for pilot launches. • Involved in debugging and verification of prototype hardware in lab environment to be able to bring products to a pilot ready stage in the field. Experience in Xilinx Spartan-3, Virtex 2, Virtex 4, Virtex 5 and Virtex 6 FPGAs, Altera MAX II CPLDs, Broadcom PHYs, Realtek switches, Transwitch EtherMap-3, MicroBlaze & PowerPC, Xilinx ISE/EDK, Xilinx ChipScope, ModelSim, CVS, Bugzilla. Show less



Pontifícia Universidade Católica do Rio Grande do Sul

• Brazil
• Higher Education
• 700 & Above Employee

• FPGA Designer

  • May 2007 - Feb 2008

  Porto Alegre Area, Brazil Research and Development for the project X10GIGA: a collaborative effort between PUCRS (through the GAPH Research Group) and DATACOM (www.datacom.ind.br), a Brazilian telecommunication equipment manufacturer. The main objective of the project was to develop an OTN transponder capable of transmitting SDH frames and Gigabit Ethernet packets at line rates of approximately 10.7 Gbit/s over long distance optical links. • Development, simulation and verification of hardware description (VHDL)… Show more Research and Development for the project X10GIGA: a collaborative effort between PUCRS (through the GAPH Research Group) and DATACOM (www.datacom.ind.br), a Brazilian telecommunication equipment manufacturer. The main objective of the project was to develop an OTN transponder capable of transmitting SDH frames and Gigabit Ethernet packets at line rates of approximately 10.7 Gbit/s over long distance optical links. • Development, simulation and verification of hardware description (VHDL) for FPGAs with tight area and timing constraints. • Research and implementation of the ITU-T G.709 recommendation. • Synthesis, implementation and prototyping using Xilinx Virtex-4/5 FPGA families. Show less



Hewlett Packard Enterprise

• United States
• IT Services and IT Consulting
• 700 & Above Employee

• Software Tester

  • Feb 2004 - Nov 2004

  Porto Alegre Area, Brazil A partnership between Hewlett-Packard (HP) Brazil and Pontifícia Universidade Católica do Rio Grande do Sul (PUCRS) through the CPTS (Software Test Research Center) group. • Research and development of new software test processes, methods and tools. • Software test: applied the knowledge acquired from research into real projects at the HP R&D in Porto Alegre - Brazil.