Thanh K. Tran

Sr MTS Design Engineer at Altera
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Contact Information
us****@****om
(386) 825-5501
Location
Milpitas, California, United States, US

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Experience

    • United States
    • Semiconductors
    • 700 & Above Employee
    • Sr MTS Design Engineer
      • Aug 2012 - Present

    • Netherlands
    • Semiconductor Manufacturing
    • 700 & Above Employee
    • ASIC Design Consultant
      • May 2010 - Aug 2012

    • United States
    • Semiconductor Manufacturing
    • 700 & Above Employee
    • ASIC Design Consultant
      • Aug 2008 - Apr 2010

      Micro-Architecture, RTL design, debug. Verification. Micro-Architecture, RTL design, debug. Verification.

    • United States
    • Semiconductor Manufacturing
    • 700 & Above Employee
    • ASIC Design Consultant
      • Sep 2007 - Jul 2008

      Working on the design and verification of the Athens5 Compact Flash Controller SoC. Responsible for the design and top level integration of ARM/ARC600 CPU core, AMBA 3 AHB MLM, Special Function Registers (SFR), RAM BIST, Test modes and Efuse controller modules. Working on the design and verification of the Athens5 Compact Flash Controller SoC. Responsible for the design and top level integration of ARM/ARC600 CPU core, AMBA 3 AHB MLM, Special Function Registers (SFR), RAM BIST, Test modes and Efuse controller modules.

    • United States
    • Semiconductor Manufacturing
    • 700 & Above Employee
    • ASIC Design Consultant
      • May 2006 - Sep 2007

      Working on the design of the UWB SoC. Responsible for the design and integration of ARM968ES, FVIC, VBUSP, Packet Buffer, RS232, UART and the Performance Monitoring modules. Experience in ARM9 processors, AMBA AHB, TI VBUS, top-level integration. Working on the design of the UWB SoC. Responsible for the design and integration of ARM968ES, FVIC, VBUSP, Packet Buffer, RS232, UART and the Performance Monitoring modules. Experience in ARM9 processors, AMBA AHB, TI VBUS, top-level integration.

    • United States
    • Semiconductor Manufacturing
    • 700 & Above Employee
    • Principal Design Engineer
      • Mar 2003 - Jun 2006

      Working on the design and development of the BCM5890 Secure Application Processor. The BCM5890 is a highly integrated system on a chip designed to execute secure applications. Responsible for the design of Secure Protection Logic, Random Number Generator, Device Management unit, ARM926ES-J, GPIO, USB, UART, SPI, I2C, D1W peripherals. The BCM5890 had completed tape-out in January 2006. Worked on bring-up the chip in the lab and ATE. Generated and debugged DFT JTAG, ATPG, MBIST test patterns for production. Experience in AMBA AHB (master/slave/arbiter/decoder), APB buses, AHB2APB bridge. March 2003 to October 2004 Responsible for the 4/2/1 Gbps FC-MAC in a 16 ports single chip Fibre Channel Fabric Switch ASIC (BCM8440) designed for edge switches. The BCM8440 was from A0 tape-out to production. Show less

    • Sr. Design Engineer
      • 1988 - 1993

Education

  • Santa Clara University
    MSEE, Electrical Engineering
    1986 - 1989
  • University of California, Berkeley
    BSEE, Electrical Engineering
    1984 - 1986

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