Experience

MODJAW

• France
• Medical Equipment Manufacturing
• 1 - 100 Employee

• Responsable Service Après Ventes

  • Sep 2021 - Present



Dialog Semiconductor

• Swindon, United Kingdom

• Senior Verification Engineer

  • Jun 2013 - Mar 2022

  Development of UVM VIPs, promoting their vertical and horizontal reuse. Mutation-based qualification of the VIPs using Certitude (Synopsys). Development of scripts and tools around Certitude so to support its deployment within the company. Presentation done at SNUG Reading and Grenoble about add-ons developped for the tool. Methodology developped around the tool to perform test ranking, based on their ability to detect faults. Development of UVM VIPs, promoting their vertical and horizontal reuse. Mutation-based qualification of the VIPs using Certitude (Synopsys). Development of scripts and tools around Certitude so to support its deployment within the company. Presentation done at SNUG Reading and Grenoble about add-ons developped for the tool. Methodology developped around the tool to perform test ranking, based on their ability to detect faults.



STMicroelectronics / STEricsson

• Senior Digital Verification Engineer

  • Jan 2007 - Jun 2013

  Development of a generic verification platform for System on chips. This environment targets mobile phone chips, in which performance and reliability requirements are difficult to meet in the very short time frame imposed by the market. The environment is coded in e, object oriented. It allows generating, observing and verifying traffic. It also provides performance analysis to validate architectural studies. Promotion and customer support in Sweden. Development of a generic verification platform for System on chips. This environment targets mobile phone chips, in which performance and reliability requirements are difficult to meet in the very short time frame imposed by the market. The environment is coded in e, object oriented. It allows generating, observing and verifying traffic. It also provides performance analysis to validate architectural studies. Promotion and customer support in Sweden.



STMicroelectronics

• Switzerland
• Semiconductor Manufacturing
• 700 & Above Employee

• Verification development and support

  • Jan 2004 - Jan 2007

  Development and European customers’ support of a verification environment for system buses, embedded in SoCs targeting digital television and DVD applications. The activity also includes support of simulation tools (Mentor & Cadence).

• FPGA design

  • Jan 2003 - Jan 2004

  Specification of an FPGA based PCI acquisition board able to capture asynchronous serial protocols.Architecture definition, design and FPGA implementation of the functions.



PSI-Electronics / mission at STMicroelectronics

• IP design

  • Jan 2001 - Jan 2003

  Architecture definition and design of an embedded debug IP. Based on a system bus analyzer, it is able to compute statistics about traffic and activity inside the chip. Management of a team for support and enhancements of the IP. Several papers and patents presented. This IP is now integrated in most SoCs of the company. Architecture definition and design of an embedded debug IP. Based on a system bus analyzer, it is able to compute statistics about traffic and activity inside the chip. Management of a team for support and enhancements of the IP. Several papers and patents presented. This IP is now integrated in most SoCs of the company.