Alexander Gilman

Analog IC Design Manager at Kinetic Technologies
  • Claim this Profile
Contact Information
us****@****om
(386) 825-5501
Location
Campbell, California, United States, US

Topline Score

Topline score feature will be out soon.

Bio

Generated by
Topline AI

You need to have a working account to view this content.
You need to have a working account to view this content.

Experience

    • United States
    • Semiconductor Manufacturing
    • 1 - 100 Employee
    • Analog IC Design Manager
      • 2022 - Present

      Development of Signal Integrity product line - redrivers and retimers for Display Port, PCIe, USB, HDMI Automotive, Industrial, and Consumer applications Development of high speed digital isolators. Digital isolators use on-chip modulation and demodulation techniques to transfer digital signals across the isolation barrier, preventing voltage spikes, noise, and ground loop interference. Digital isolators are used in a wide range of applications - industrial motor drives, automation, solar inverters, battery management, communication interfaces, medical devices, optical networking, IoT and Automotive. Show less

    • United States
    • 1 - 100 Employee
    • Consultant
      • 2020 - Present

      Early stage start-up consulting. Early stage start-up consulting.

    • United States
    • Semiconductor Manufacturing
    • 1 - 100 Employee
    • Technical Advisory Board Member
      • 2019 - 2022

      Diakopto was acquired by Ansys in 2023 Applications of Diakopto EDA tools to designs of multi-gigabit ICs in leading CMOS process nodes. ParagonX is a software platform and methodology for layout parasitics visualization and optimization that improves IC design flow, thereby improving performance, reliability, and time to market. Diakopto was acquired by Ansys in 2023 Applications of Diakopto EDA tools to designs of multi-gigabit ICs in leading CMOS process nodes. ParagonX is a software platform and methodology for layout parasitics visualization and optimization that improves IC design flow, thereby improving performance, reliability, and time to market.

    • Switzerland
    • Biotechnology Research
    • 700 & Above Employee
    • Senior Analog IC Design Engineer, High Speed Data Interface Lead
      • 2015 - 2019

      Development of integrated circuits for Next-Generation DNA Sequencing (Genia Technologies acquisition). Drove the definition and development of 10Gb/s serial interface - single sequencing chip produced 640 Gb/s of data. Development of integrated circuits for Next-Generation DNA Sequencing (Genia Technologies acquisition). Drove the definition and development of 10Gb/s serial interface - single sequencing chip produced 640 Gb/s of data.

    • Semiconductor Manufacturing
    • 700 & Above Employee
    • Senior Staff IC Design Engineer
      • 2014 - 2015

      Design of analog IP for microcontrollers Design of analog IP for microcontrollers

    • United States
    • Pharmaceutical Manufacturing
    • 1 - 100 Employee
    • Staff Analog Design Engineer, Raisin IC Project Lead
      • 2009 - 2013

      Raisin is an ingestible, self-powering IC that is embedded into a pharmaceutical pill to broadcast a unique ID when the pill is swallowed, thereby marking the event. Raisin is an ingestible, self-powering IC that is embedded into a pharmaceutical pill to broadcast a unique ID when the pill is swallowed, thereby marking the event.

    • Japan
    • Semiconductor Manufacturing
    • 400 - 500 Employee
    • Principal Analog Design Engineer
      • 2006 - 2009

      Definition, architecture and design of active cables - cables with embedded equalizer ICs operating at speeds up to 12Gb/s, compensating losses up to 30dB. Quellan Inc was acquired by Intersil. Definition, architecture and design of active cables - cables with embedded equalizer ICs operating at speeds up to 12Gb/s, compensating losses up to 30dB. Quellan Inc was acquired by Intersil.

    • United States
    • Semiconductor Manufacturing
    • 700 & Above Employee
    • Senior Member of Technical Staff, Analog Design at Fiber Optic Communications Group
      • 2000 - 2006

      Design of multi-gigabit adaptive cable & backplane equalizers, transimpedance (TIA) amplifiers and limiting amplifiers in 60GHz SiGe process, operating speed of up to 12.5Gb/s Design of multi-gigabit adaptive cable & backplane equalizers, transimpedance (TIA) amplifiers and limiting amplifiers in 60GHz SiGe process, operating speed of up to 12.5Gb/s

    • United States
    • Research Services
    • 700 & Above Employee
    • Center for Microtechnology, Student Researcher
      • Jun 1998 - Sep 1998

Education

  • UC Santa Barbara
    MS, Electrical Engineering
    1998 - 2000
  • UC Santa Barbara
    BS, Electrical and Computer Engineering
    1994 - 1998

Community

You need to have a working account to view this content. Click here to join now