Anuj J
Researcher at IDLab (UGent - UAntwerpen - imec)- Claim this Profile
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German A1 (Goethe zertifikat) Elementary proficiency
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Tamil Native or bilingual proficiency
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Hindi A1 (Madhyama) Elementary proficiency
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English C1 (IELTS) Professional working proficiency
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French A1 (Basics at Loyola) Elementary proficiency
Topline Score
Bio
Credentials
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edX Verified Certificate for Applications of TinyML
edXDec, 2021- Nov, 2024 -
edX Verified Certificate for Fundamentals of TinyML
edXJul, 2021- Nov, 2024
Experience
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IDLab (UGent - UAntwerpen - imec)
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Belgium
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Research
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1 - 100 Employee
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Researcher
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Feb 2021 - Present
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Laboratoire TIMA / TIMA Laboratory
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France
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Nanotechnology Research
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1 - 100 Employee
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Research Intern
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Nov 2022 - Dec 2022
I learnt a lot about collaboration and inclusiveness during this sponsored research stay. It was an absolute pleasure to work with the team members of AMfoRS in TIMA, under the guidance of Prof. Rodrigo. I worked on analyzing the results of the previous radiation test campaigns and understanding their platform for such experiments. Thanks to the French government for sponsoring this research stay under 'Bourse de mobilité Génération IA 2030' programme. I learnt a lot about collaboration and inclusiveness during this sponsored research stay. It was an absolute pleasure to work with the team members of AMfoRS in TIMA, under the guidance of Prof. Rodrigo. I worked on analyzing the results of the previous radiation test campaigns and understanding their platform for such experiments. Thanks to the French government for sponsoring this research stay under 'Bourse de mobilité Génération IA 2030' programme.
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Indian Institute of Technology, Madras
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India
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Higher Education
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700 & Above Employee
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Project Associate
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Jul 2019 - Nov 2020
GEM5, RISCOF and ISA Compliance tests GEM5, RISCOF and ISA Compliance tests
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Indian Institute of Technology, Madras
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India
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Higher Education
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700 & Above Employee
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Research Intern
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Nov 2018 - Feb 2019
Custom processor IP core with RISC-V ISA needed a test suite to verify its compliance with the ISA specification. Tests with assembly language targeting privilege specification of ISA was written including tests to assess the response to page table faults. A bug related to the implementation of register mepc was also detected. Also involved in translating some of the RISC-V compliance tests for the riscof framework. Custom processor IP core with RISC-V ISA needed a test suite to verify its compliance with the ISA specification. Tests with assembly language targeting privilege specification of ISA was written including tests to assess the response to page table faults. A bug related to the implementation of register mepc was also detected. Also involved in translating some of the RISC-V compliance tests for the riscof framework.
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Newtech Solutions
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Bengaluru, Karnataka, India
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Internship Project
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Apr 2018 - May 2018
A harness test system based on 'scanning for continuity' method was completely designed using Proteus Design Suite and implementation was verified through simulation. The system was designed for a wire harness with a maximum bus width of 80 which is to be used for the development of ground control unit used in satellite communication. The design featured Atmega328p combined with Nokia 5110 display for viewing the results. Physical button based HMI was used for scan control and browsing through… Show more A harness test system based on 'scanning for continuity' method was completely designed using Proteus Design Suite and implementation was verified through simulation. The system was designed for a wire harness with a maximum bus width of 80 which is to be used for the development of ground control unit used in satellite communication. The design featured Atmega328p combined with Nokia 5110 display for viewing the results. Physical button based HMI was used for scan control and browsing through the results. As a part of the internship, I also attended a one-day tour to understand the process of designing and testing the satellites at ISRO Show less A harness test system based on 'scanning for continuity' method was completely designed using Proteus Design Suite and implementation was verified through simulation. The system was designed for a wire harness with a maximum bus width of 80 which is to be used for the development of ground control unit used in satellite communication. The design featured Atmega328p combined with Nokia 5110 display for viewing the results. Physical button based HMI was used for scan control and browsing through… Show more A harness test system based on 'scanning for continuity' method was completely designed using Proteus Design Suite and implementation was verified through simulation. The system was designed for a wire harness with a maximum bus width of 80 which is to be used for the development of ground control unit used in satellite communication. The design featured Atmega328p combined with Nokia 5110 display for viewing the results. Physical button based HMI was used for scan control and browsing through the results. As a part of the internship, I also attended a one-day tour to understand the process of designing and testing the satellites at ISRO Show less
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Prefix Technologies
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Chennai, Tamil Nadu, India
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Internship Trainee
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Dec 2016 - Jan 2017
Learnt about VRMs built in Motherboards. Learnt about VRMs built in Motherboards.
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Goldman Sachs
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United States
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Financial Services
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700 & Above Employee
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Summer Analyst / Programmer
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May 2016 - Jun 2016
Eight weeks of summer internship with Product management team as an analyst/programmer. Eight weeks of summer internship with Product management team as an analyst/programmer.
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Student Intern
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Jul 2012 - Jul 2012
Was invited to attend this one week Science camp under DST-INSPIRE scheme during my 11th grade. Was invited to attend this one week Science camp under DST-INSPIRE scheme during my 11th grade.
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Education
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University of Antwerp
Doctor of Philosophy - PhD, Applied Engineering -
St. Joseph's College (Autonomous), Trichy
Master of Science, Electronics -
Loyola College
Bachelor's degree, Theoretical and Mathematical Physics