Experience

Uhnder, Inc.

• United States
• Semiconductor Manufacturing
• 1 - 100 Employee

• Senior Analog Design Engineer

  • Jul 2022 - Present



North Carolina State University

• United States
• Higher Education
• 700 & Above Employee

• Graduate Research Assistant

  • Jan 2015 - Mar 2023

  Working on enabling mmWave N-path receivers and tunable N-path filters in 5-50 GHz frequency range with a focus on multiphase non 50% duty cycle clock generation. Working on enabling mmWave N-path receivers and tunable N-path filters in 5-50 GHz frequency range with a focus on multiphase non 50% duty cycle clock generation.



Uhnder, Inc.

• United States
• Semiconductor Manufacturing
• 1 - 100 Employee

• Analog Intern

  • May 2020 - Aug 2020

  Design and optimization of a high fractional bandwidth transmitter front end with stringent area constraints. Worked on LO amplifiers, Mixer,Power Amplifier and transformer based matching networks. Design and optimization of a high fractional bandwidth transmitter front end with stringent area constraints. Worked on LO amplifiers, Mixer,Power Amplifier and transformer based matching networks.



Cirrus Logic

• United States
• Semiconductor Manufacturing
• 700 & Above Employee

• Physical Design Engineer

  • May 2014 - Aug 2014

  Developed and performed power integrity tests including IR Drop and EM analysis for signoff on a power gated design using Cadence Voltus IC power integrity solution. Gained understanding of the Common Power Format (CPF) and performed formal verification using Conformal Low Power with CPF. Worked on a RTL solution for custom synchronous On Chip Clock Control from existing basic OCC in verilog. Understood basics of ATPG and STIL files and its use in scan chains. Developed and performed power integrity tests including IR Drop and EM analysis for signoff on a power gated design using Cadence Voltus IC power integrity solution. Gained understanding of the Common Power Format (CPF) and performed formal verification using Conformal Low Power with CPF. Worked on a RTL solution for custom synchronous On Chip Clock Control from existing basic OCC in verilog. Understood basics of ATPG and STIL files and its use in scan chains.



NI (National Instruments)

• United States
• Electrical Equipment Manufacturing
• 700 & Above Employee

• Software Engineer

  • Jul 2011 - Jul 2013

  Designed and implemented RF measurement algorithms and test applications along with emulating a transceiver in labVIEW for physical and MAC layer of 802.11 WLAN system and physical layer of 3gpp WCDMA system.Gained better understanding of Communication concepts like Receiver Error Correction, OFDM, MIMO through hands on experience. Proposed and implemented innovative new method of spectral measurement which greatly improved the measurement capability as a hobby project. Published in journal and also presented in NI Tech 2013. Show less