Ahmet Baştuğ
Founder at Video Analitik- Claim this Profile
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English Professional working proficiency
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French Limited working proficiency
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Turkish Native or bilingual proficiency
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Italian Elementary proficiency
Topline Score
Bio
Experience
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Video Analitik
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Türkiye
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Software Development
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1 - 100 Employee
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Founder
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Jul 2014 - Present
As a contractor/consultant (most of time cooperating with other researchers/developers/engineers/students) contributing to Computer Vision/Image Processing, DSP, Positioning, Digital Design, ... technologies/projects in industry and military As a contractor/consultant (most of time cooperating with other researchers/developers/engineers/students) contributing to Computer Vision/Image Processing, DSP, Positioning, Digital Design, ... technologies/projects in industry and military
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Mulberry Sensors
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United States
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Semiconductor Manufacturing
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1 - 100 Employee
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Director of Software and Algorithms
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Mar 2020 - Present
Responsible for Digital Signal Processing (DSP), Algorithm Development, Artificial Intelligence & Machine Learning (AI/ML) and Computer Aided Design (CAD) Operations Responsible for Digital Signal Processing (DSP), Algorithm Development, Artificial Intelligence & Machine Learning (AI/ML) and Computer Aided Design (CAD) Operations
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Analog Devices
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United States
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Semiconductor Manufacturing
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700 & Above Employee
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Algorithm Development Consultant
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Mar 2017 - Dec 2019
- Participated in QCL sensor development activities- Developed end to end system simulations and detection & estimation & regression algorithms using mostly Matlab and Python- Did optical ray simulations with Comsol Multiphysics - Participated in QCL sensor development activities- Developed end to end system simulations and detection & estimation & regression algorithms using mostly Matlab and Python- Did optical ray simulations with Comsol Multiphysics
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Özyeğin University
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Türkiye
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Higher Education
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700 & Above Employee
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Visiting Lecturer & Supervisor
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Sep 2015 - Aug 2016
Taught EE 203 (Digital Systems, mostly FPGA design with Verilog); co-supervised students and collaborated with academics on computer vision and signal processing topics Taught EE 203 (Digital Systems, mostly FPGA design with Verilog); co-supervised students and collaborated with academics on computer vision and signal processing topics
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Vestel
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Türkiye
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Computers and Electronics Manufacturing
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700 & Above Employee
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Principal Architect / Research Fellow
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Jul 2010 - Jun 2013
Responsible from algorithm and system development R&D activities
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System Architect
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Nov 2006 - Jul 2010
Signal Processing, Video and Image Processing with Emphasis on Motion-Based Frame Rate Conversion and Resolution Increase Applications
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ArrayComm
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China
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Wireless Services
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1 - 100 Employee
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Full Time Consultant
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Sep 2006 - Feb 2007
Full-time Consulting Services on HSDPA receiver algorithms, in particular equalizers and interference cancellers and their multiple antenna extensions Full-time Consulting Services on HSDPA receiver algorithms, in particular equalizers and interference cancellers and their multiple antenna extensions
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NXP Semiconductors
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Netherlands
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Semiconductor Manufacturing
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700 & Above Employee
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UMTS Algorithm Development Engineer
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Mar 2004 - Aug 2006
- Applied research and development on channel equalization, channel estimation and multiuser detection aspects for UMTS FDD-mode mobile terminals with particular emphasis on HSDPA- Extensive collaboration with Philips Research, UK and Philips Semiconductors, Nuremberg/Germany on HSDPA receiver development
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Institutional Consultant
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Dec 2003 - Mar 2004
Consulting Services on HSDPA System Aspects
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EURECOM
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France
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Research Services
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100 - 200 Employee
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Research Assistant
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Nov 2002 - Aug 2006
Assistance to Prof. Dirk Slock with applied Signal Processing research Assistance to Prof. Dirk Slock with applied Signal Processing research
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STMicroelectronics
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Switzerland
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Semiconductor Manufacturing
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700 & Above Employee
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ASIC Design Engineer
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Mar 2002 - Sep 2002
Global functional verification and synthesis tasks for OFDM based ADSL/VDSL chip-sets
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ASIC Design Engineer (Alcatel Microelectronics era)
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Jul 1999 - Mar 2002
Front end ASIC development tasks: System C modeling, VHDL and Verilog design entries, functional simulations, synthesis, design for testability and static timing analysis in the context of HIPERLAN-2 & IEEE802.11a standard Wireless LAN, Bluetooth and Mixed Signal Short Haul Plain Old Telephone System (SHPOTS) chip-sets physical layers.
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Karel
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Türkiye
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Telecommunications
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700 & Above Employee
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Intern FPGA Designer
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Jul 1998 - May 1999
VHDL design for digital PBX system components VHDL design for digital PBX system components
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Education
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Télécom Paris (Institut Polytechnique de Paris)
Phd, Mobile Communications & Signal Processing -
Boğaziçi University
MSc, Electrical and Electronics Engineering -
Orta Doğu Teknik Üniversitesi / Middle East Technical University
BSc, Electrical and Electronics Engineering -
Eskişehir Fatih Fen Lisesi
High School, Maths, Chemistry, Physics