Experience

WaferTech

• United States
• Semiconductor Manufacturing
• 300 - 400 Employee

• Sr. Process Integration Engineer

  • Jan 2017 - Present

  Camas, WA Owner of logic, SRAM, flash, EEPROM, and RF IC products across multiple technology nodes for several foundry customers with knowledge of automotive standards and familiarity in CMOS, BJT, and LDMOS device engineering. • Serves as the technical lead of Fab11 New Tape-Out team that ensures smooth foundry customer tape-outs. Routinely creates process flow for customer's new products as well as TSMC Cybershuttle. • Expanded fab's technology portfolio by qualifying new options and processes… Show more Owner of logic, SRAM, flash, EEPROM, and RF IC products across multiple technology nodes for several foundry customers with knowledge of automotive standards and familiarity in CMOS, BJT, and LDMOS device engineering. • Serves as the technical lead of Fab11 New Tape-Out team that ensures smooth foundry customer tape-outs. Routinely creates process flow for customer's new products as well as TSMC Cybershuttle. • Expanded fab's technology portfolio by qualifying new options and processes for existing technology nodes, securing multiple new product introductions and sources of revenue for the company. • Acted as project lead for product transfer that met customer’s aggressive schedule and successfully matched mother fab's baseline yield on pilot lot. • Developed non-standard passivation schemes that satisfied customer’s requirements for thickness uniformity as well wafer bow and warpage, enabling ramping up of customer’s sensor product. • Qualified green anti-reflection coating materials to ensure compliance with environmental standards while maintaining device characteristics baseline and product yield. • Improved extreme wafer edge yield due to contact open by qualifying and implementing a new process that reduced ILD CMP non-uniformity by 50%. • Resolved a yield issue by working with customer’s design team to locate layouts susceptible to photolithography exposure energy marginality. Corrective actions and learning were fanned out to other TSMCs fabs. • Acted as case owner of fab excursion events. Fab11 was best-in-class for zero event occurrence in TSMC 200-mm fabs. Show less



Intel Corporation

• United States
• Semiconductor Manufacturing
• 700 & Above Employee

• Module & Integration Yield Engineer

  • Apr 2013 - May 2016

  Hillsboro, OR Develop, qualify, implement, improve, and maintain wafer defect inspection tool in the Logic Technology Development organization. Assist in establishing equipment roadmap to address new technical challenges presented by progressively smaller technology nodes. Define and implement process control limits and procedures to ensure tool stability and company-wide tool matching. • Created robust wafer inspection recipes for various front and back end process steps using expertise in optics and… Show more Develop, qualify, implement, improve, and maintain wafer defect inspection tool in the Logic Technology Development organization. Assist in establishing equipment roadmap to address new technical challenges presented by progressively smaller technology nodes. Define and implement process control limits and procedures to ensure tool stability and company-wide tool matching. • Created robust wafer inspection recipes for various front and back end process steps using expertise in optics and image processing to increase inline defect visibility by up to 100 fold. • Presented critical defect data and collaborated with process integrators, E-test engineers, and engineers in other modules to drastically improve yield in numerous microprocessor and system on a chip (SoC) products. • Resolved a wide variety of tool issues including software bugs as well as faulty components by working closely with tool vendor. Debugged numerous factory automation related issues. Improved inventory and documentation to shorten time waiting for replacement parts. As a result, tool uptime exceeds 95%. • Lead a cross-site team to coordinated transfer of module-specific process recipes, procedures, and learning to high volume manufacturing sites. Show less



University of Illinois at Urbana-Champaign

• Higher Education
• 1 - 100 Employee

• Graduate Teaching Assistant

  • Jan 2012 - May 2012

  Urbana-Champaign, Illinois Area Supervised lab sessions and demonstrated use of equipments to students for ECE 495 (Photonic Device Laboratory).

• Graduate Research Assistant

  • 2006 - 2012

  Urbana-Champaign, Illinois Area Performed research activities on semiconductor optoelectronic devices in Professor Kent Choquette’s group ranging from design, modeling, fabrication, testing, to result publication and presentation. • Demonstrated single mode photonic crystal vertical-cavity surface-emitting lasers (VCSELs) capable of error-free data transmission over kilometer-long fiber links at high data rate (25 Gb/s) while operating at record-low current density. Reduced fabrication complexity by creating a self-aligned… Show more Performed research activities on semiconductor optoelectronic devices in Professor Kent Choquette’s group ranging from design, modeling, fabrication, testing, to result publication and presentation. • Demonstrated single mode photonic crystal vertical-cavity surface-emitting lasers (VCSELs) capable of error-free data transmission over kilometer-long fiber links at high data rate (25 Gb/s) while operating at record-low current density. Reduced fabrication complexity by creating a self-aligned process. • Demonstrated a novel VCSEL modulation scheme with record-low switching power and record-high extinction ratio utilizing bias-controlled polarization switching enabled by anisotropic optical and current aperture design. Completed the project involving design, fabrication to testing in less than 4 months. • Facilitated optoelectronic device characterization in a large cross-campus, multidisciplinary research project exploring non-invasive optogenetic applications to wirelessly control neural activities in living organisms. • Modeled filamentation and lateral mode stabilizing schemes suitable for mass production using the beam-propagation method in a project that successfully reduced catastrophic mirror damage in high-power semiconductor edge-emitting lasers, hence extending laser lifetime.

• Graduate Teaching Assistant

  • Jan 2008 - May 2008

  Urbana-Champaign, Illinois Area Supervised lab sessions and demonstrated use of equipments to students for ECE 495 (Photonic Device Laboratory). Also graded students' lab reports.

• Graduate Teaching Assistant

  • Aug 2007 - Dec 2007

  Urbana-Champaign, Illinois Area Head teaching assistant for ECE 442 (Electronic Circuits) : • Held office hours to answer questions regarding lectures and homework assignments. • Prepared detailed homework solution sets and graded homework assignments.

• Graduate Technical Intern

  • Jun 2011 - Aug 2011

  Hillsboro, OR Studied and modeled optical multiplexer/demultiplexer in optical interconnects employing wavelength division multiplexing (WDM) for the Intel Components Research organization. • Transferred synthesized learning of device physics and simulation methods from extensive literature research to the employing organization. • Designed and modeled WDM devices as well as laser-to-waveguide coupling for new wavelengths using commercial FDTD and beam-propagation method (BPM) as well as self-developed… Show more Studied and modeled optical multiplexer/demultiplexer in optical interconnects employing wavelength division multiplexing (WDM) for the Intel Components Research organization. • Transferred synthesized learning of device physics and simulation methods from extensive literature research to the employing organization. • Designed and modeled WDM devices as well as laser-to-waveguide coupling for new wavelengths using commercial FDTD and beam-propagation method (BPM) as well as self-developed semi-analytical simulation tools. Simulated devices were fabricated and showed behaviors as predicted by simulations. Show less