Thom Smith

Senior IC Design Engineer at PragmatIC
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Contact Information
us****@****om
(386) 825-5501
Location
Sheffield, England, United Kingdom, UK

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Experience

    • United Kingdom
    • Semiconductor Manufacturing
    • 100 - 200 Employee
    • Senior IC Design Engineer
      • Oct 2020 - Present

    • United Kingdom
    • Semiconductor Manufacturing
    • 1 - 100 Employee
    • Mixed Signal Design Engineer
      • May 2013 - Apr 2020

      Member of design team brought on by CML at a new office in Sheffield to be an extension of their existing IC design team. Member of design team brought on by CML at a new office in Sheffield to be an extension of their existing IC design team.

    • Netherlands
    • Semiconductor Manufacturing
    • 700 & Above Employee
    • Senior Mixed Signal Design Engineer
      • Aug 2010 - Feb 2013

      Mixed signal CMOS circuit design, simulation, layout and verification (DRC, LVS, ERC) for integrated circuits. Contributor to tapeout process including top level verification. Lab testing of ICs, including verification of performance, fault-finding, bug fixing and design improvement. Version control database manager, project design environment administrator and CAD tool co-administrator. Technical documents including: design reports, application notes, some datasheet contributions. Mixed signal CMOS circuit design, simulation, layout and verification (DRC, LVS, ERC) for integrated circuits. Contributor to tapeout process including top level verification. Lab testing of ICs, including verification of performance, fault-finding, bug fixing and design improvement. Version control database manager, project design environment administrator and CAD tool co-administrator. Technical documents including: design reports, application notes, some datasheet contributions.

    • Semiconductor Manufacturing
    • 1 - 100 Employee
    • Mixed Signal Design Engineer
      • Aug 2008 - Aug 2010

      Analogue and logic CMOS circuit design, schematic capture, simulation verification, layout design, parasitic extraction. Lab testing, fault-finding and bug fixing. Version control database management. CAD tool and project environment administration and customisation. Analogue and logic CMOS circuit design, schematic capture, simulation verification, layout design, parasitic extraction. Lab testing, fault-finding and bug fixing. Version control database management. CAD tool and project environment administration and customisation.

Education

  • Sheffield University
    Master of Engineering (MEng), Electronic Engineering
    2003 - 2007
  • Helsby High School
    4 A levels, Maths, Physics, Design and Technology, General Studies
    1996 - 2003

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