Experience

Rivos Inc.

• United States
• Computer Hardware Manufacturing
• 100 - 200 Employee

• Design Engineer

  • May 2022 - Aug 2023

  Amazing power stuff Amazing power stuff



Qualcomm

• United States
• Telecommunications
• 700 & Above Employee

• Staff Design Engineer

  • Jun 2019 - Apr 2022

  Power, fishtail, synthesis, STA Power lead for next gen auto IP Next gen auto SOC Synth lead for 25 IP's Supported power analysis activities for different mid tier snapdragon SOC's

• Staff Design Engineer

  • Apr 2017 - May 2019

  First Implementation engineer at Qualcomm Ireland and set the flow for entire front end implementation activities. Worked on multiple generation sensor subsystem related implementation activities. Supported implementation activities for DSP block



Synopsys Inc

• United States
• Software Development
• 700 & Above Employee

• Senior R&D Engineer

  • Feb 2016 - Mar 2017

  The best team and the best company I worked with. All good PhD and very brainy batch. Worked on cutting edge algorithms dealing with Path Based Analysis. It is so much fun to deal with memory related constraints instead of power and timing. The best team and the best company I worked with. All good PhD and very brainy batch. Worked on cutting edge algorithms dealing with Path Based Analysis. It is so much fun to deal with memory related constraints instead of power and timing.



University College Cork

• Ireland
• Higher Education
• 700 & Above Employee

• Research Student

  • Feb 2013 - Jan 2016

  Focus of study extends to various domains namely gate level modelling, RTL coding for IP development, EDA tool design methodology and most importantly logic synthesis tool development. I will be interacting with various minds spread across the Europe & the US Focus of study extends to various domains namely gate level modelling, RTL coding for IP development, EDA tool design methodology and most importantly logic synthesis tool development. I will be interacting with various minds spread across the Europe & the US



Cypress Semiconductor Corporation

• Semiconductor Manufacturing
• 700 & Above Employee

• Senior Design Engineer

  • Sep 2011 - Jan 2013

  Setup the IO characterization flow from scratch Presented my work as a paper in the internal conference "CITEC" Setup the IO characterization flow from scratch Presented my work as a paper in the internal conference "CITEC"



NXP/CYPRESS/IISC/NITK/STMICRO

• Bengaluru, Karnataka, India

• Contract Roles

  • Aug 2007 - Aug 2011

  Worked on various assignments like o STDCELL & IO library and testchip characterization o Timing, Power & Noise Models o Setting up tool flows from scratch o Teaching undergrad & Grad students o MEMS based research which resulted in reputed journal paper Worked on various assignments like o STDCELL & IO library and testchip characterization o Timing, Power & Noise Models o Setting up tool flows from scratch o Teaching undergrad & Grad students o MEMS based research which resulted in reputed journal paper



Intel Corporation

• United States
• Semiconductor Manufacturing
• 700 & Above Employee

• Student Intern

  • Jun 2006 - May 2007

  Worked on my masters thesis on IA32 architecture and RAS feature validation Worked on my masters thesis on IA32 architecture and RAS feature validation