Shreyansh Mathur

Digital Logic System Design Trainee at PinE Training Academy

Anshika Awasthi

Trainee at PinE Training Academy

Rakshit Srivastava

Student at KIET Group of Institutions

Shivshankar Tripathi

Verilog |Gate design| Vlsi basics| Public relations |Trainee

Shubham Kanrar

Design & Verification trainee at PinE Training Academy

Yusuf .

ASIC|| Analog Design|| Full Custom Layout ,Standard Cell Schematic And Layout Design

Sukhad Tyagi

KIET Group of Institutions,Ghaziabad ||Engineering Student || Learner || Trainee at PinE Training Academy || Verilog learner||Linux||Analog Layout||Analog design