Yuichi Segawa

Design Manager at Kinetic Technologies
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Contact Information
Location
Japan, JP
Languages
  • 日本語 Native or bilingual proficiency
  • English Professional working proficiency

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Experience

    • United States
    • Semiconductor Manufacturing
    • 1 - 100 Employee
    • Design Manager
      • Apr 2020 - Present

      SerDes IP development SerDes IP development

    • Japan
    • Semiconductor Manufacturing
    • 1 - 100 Employee
    • Senior Manager, Mixed Signal/Analog Design
      • Apr 2013 - Apr 2020

      - AFE IC development for the automotive - AFE IC development for the home network - AFE IC development for the automotive - AFE IC development for the home network

    • Japan
    • Semiconductors
    • 1 - 100 Employee
    • Principal Designer, Mixed Signal/Analog Design
      • 2006 - 2013

      - AFE IC development for the home network

    • Senior Designer, Mixed Signal/Analog design
      • 2001 - 2006

      - 10Gbps SerDes IP development- SerDes IP development (XUAI SerDes, PCI-express Gen1, SATA Gen1, USB2.0)- LVDS-RX, LVDS-TX development

    • Appliances, Electrical, and Electronics Manufacturing
    • Circuit Design Engineer
      • 1992 - 2001

      - CMOS GPS RF front end IC development - SOI application research - Memory IP development for ASIC (1port SRAM, 2port SRAM, ROM, 2Tr-DRAM, 3Tr-DRAM, Flash memory) - CMOS GPS RF front end IC development - SOI application research - Memory IP development for ASIC (1port SRAM, 2port SRAM, ROM, 2Tr-DRAM, 3Tr-DRAM, Flash memory)

Education

  • Hokkaido University
    Master's degree, Physics
    1990 - 1992

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