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Paul O'toole is a seasoned defense and design expert with 30+ years of experience in leading systems engineering roles for top-tier aerospace and defense companies. He has a strong educational background in physics from Leeds University UK and has worked on numerous high-profile projects, including the Galileo spacecraft flight software and the Joint Strike Fighter 270 Vdc Mil-Std 704E Secondary electrical Power and Thermal Management System.

Experience

  • Raytheon TSC
    • El Segundo Ca
    • Principal Engineer
      • Jun 2004 - Mar 2012
      • El Segundo Ca

      Lead Systems engineer for Built in Test (BIT), Diagnostics and Testability functions of multi channel digital Doppler Radar Receiver(s) and Opto-electronic/LADAR Sensor system for use in the E2D aircraft. Detailed system level S, I and P BIT design and corresponding requirements development, mana...

    • Principal Engineer
      • Jul 2002 - Aug 2003

      Development and management of System Requirements of the Joint Strike Fighter (JSF) 270 Vdc Mil-Std 704E Secondary electrical Power and Thermal Management System (PTMS) Performance Based Specification (PBS) using DOORS. Top level and detailed design of Integrated Test Stand (ITS) incorporating Ho...

    • Principal Systems Engineer
      • Jan 2000 - Feb 2002

      Prognostics & Health Management).Requirements definition and conceptual design of BIT algorithms and Hardware for use in a ruggedized RTCA/DO160 compliant distributed/multi-processor FDM based In-Flight-Entertainment Video/Audio distribution network. System test of Ethernet, ARCNET and ARINC ...

    • LRU Engineer
      • Nov 1998 - Apr 1999

      Requirements definition, management, conceptual and detailed design of ruggedized In Flight Entertainment Aircraft Cabin Operations Manager LRU based on Ampro P5e Pentium (PC/104 ISA) single board computer, Audio/Video cross-point switch under FPGA control, LCD display and Touch-screen, DVD, Ethe...

    • Unit Engineer
      • Aug 1997 - Aug 1998

      Design, development test and of ruggedized central Video Control Unit (VCU) and display for use in an Aircraft In Flight Entertainment (IFE) system. Unit design based on a 486 embedded processor with PCI/ISA/SCSI bus architecture, customized Bios, backlit LCD display with Touch Screen Interface. ...

    • Hardware/Software Engineer
      • Jul 1992 - Jun 1997

      Design and development of the Galileo spacecraft flight software (FSW) for use in an embedded multiprocessor Command-Data-Subsystem (CDS) in support of the Low Gain Antenna (LGA) comms link. Detailed design, Assembly language coding, unit test and Hardware/ Software integration of real-time and r...

    • Engineering Group Leader
      • Jan 1991 - Apr 1992

      Integration and test of processor based (8751) spacecraft vehicle interface unit and telemetry system for use in the ARIES Space Defense Initiative launch system.Test plans, Acceptance Test (ATP) and Design verification Test (DVT) proceduresand Interface Control Document (ICD) Schedule management...

    • Research Scientist
      • Jan 1988 - Jan 1991

      Conceptual and detailed design of airborne multi-processor secure data communications link based on Teledyne’s 1750 bit slice processor (TDY 43) using AMD 2900 components and VME bus architecture and INTELs 8751 micro-controller.Hardware and software design, functional partitioning and interface ...

    • Principal Engineer
      • Jan 1981 - Jan 1988

      System definition and detailed design of TDM high speed QPSK modem featuring adaptive equalization based on an Infinite Impulse Response (IIR) Digital filter. Integration of modem into tropospheric scatter radio communications system. Bit error rate (BER) measurements and system test using Tropos...

    • Senior engineer
      • Jan 1976 - Jan 1981

      Detailed design of Identification Friend or Foe (IFF) target simulator using processed pulse modulated RF reply codes to define range delay, range attenuation and azimuth bearing of airborne enemy/friendly targets.2) Design and development of automatic reply code change unit for an IFF airborne i...

    • Engineer
      • Jan 1974 - Jan 1976

      Detailed design of voice and non-voice interface to a secure military radio communications network. Implementation of system protocols and error detection and correction techniques.Design of Pseudo random noise generator and Continuous Variable Slope Delta (CVSD) modulator.2) AJAX AIRBORNE RADAR ...

Education

  • 1970 - 1974
    Leeds University UK

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Industry Focus. “Aerospace and Defense”

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